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SERDAT 030 W P Serial port data and stop bits write
(transmit data buffer)
This address writes data to a transmit data buffer.
Data from this buffer is moved into a serial shift
register for output transmission whenever it is
empty. This sets the interrupt request TBE
(transmit buffer empty). A stop bit must be
provided as part of the data word. The length of
the data word is set by the position of the stop
bit.
BIT# 15,14,13,12,11,10,09,08,07,06,05,04,03,02,01,00
----------------------------------------------------
USE 0 0 0 0 0 0 S D8 D7 D6 D5 D4 D3 D2 D1 D0
Note: S = stop bit = 1, D = data bits.
SERDATR 018 R P Serial port data and status read
(receive data buffer)
This address reads data from a receive data buffer.
Data in this buffer is loaded from a receiving
shift register whenever it is full. Several
interrupt request bits are also read at this
address, along with the data, as shown below.
BIT# SYM FUNCTION
15 OVRUN Serial port receiver overrun.
Reset by resetting bit 11 of INTREQ.
14 RBF Serial port receive buffer full
(mirror).
13 TBE Serial port transmit buffer empty (mirror).
12 TSRE Serial port transmit shift register empty.
Reset by loading into buffer.
11 RXD RXD pin receives UART serial data for direct bit test
by the microprocessor.
10 0 Not used
09 STP Stop bit
08 STP-DB8 Stop bit if LONG, data bit if not.
07 DB7 Data bit
06 DB6 Data bit
05 DBS Data bit
04 DB4 Data bit
03 DB3 Data bit
02 DB2 Data bit
01 DB1 Data bit
00 DB0 Data bit
- Appendix A 277 -
Summary of Contents for Amiga A1000
Page 1: ...AMIGA HARDWARE REFERENCE MANUAL 1992 Commodore Business Machines Amiga 1200 PAL...
Page 20: ...Figure 1 1 Block Diagram for the Amiga Computer Family Introduction 11...
Page 21: ...12 Introduction...
Page 72: ...Figure 3 12 A dual Playfield display Playfield Hardware 63...
Page 87: ...Figure 3 24 Horizontal Scrolling 78 playfield hardware...
Page 101: ...92 Playfield Hardware...
Page 199: ...Figure 6 9 DMA time slot allocation 190 Blitter hardware...
Page 203: ...Figure 6 13 Blitter Block Diagram 194 Blitter Hardware...
Page 229: ...220 System Control Hardware...
Page 246: ...Figure 8 8 Chinon Timing diagram cont Interface Hardware 237...
Page 265: ...256 Interface Hardware...
Page 289: ...280 Appendix A...
Page 297: ...288 Appendix B...
Page 298: ...APPENDIX C CUSTOM CHIP PIN ALLOCATION LIST NOTE Means an active low signal Appendix C 289...
Page 302: ...APPENDIX D SYSTEM MEMORY MAP Appendix D 293...
Page 343: ...334 Appendix F...
Page 351: ...342 Appendix G...
Page 361: ...352 Appendix H...
Page 367: ...358 Appendix I...