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Sound data is organized as a set of eight-bit data items; each item is a sample from the
waveform. Each data word retrieved for the audio channel consists of two samples.
Sample values can range from -128 to +127.
As an example, the data set shown below produces a close approximation to a sine wave.
NOTE
The data is stored in byte address order with the first digitized amplitude value at the
lowest byte address, the second at the next byte address, and so on. Also, note that the
first byte of data must start at a word-address boundary. This is because the audio DMA
retrieves one word (16 bits) at a time and uses the sample it reads as two bytes of data.
To use audio channel 0, write the address of "audiodata" into AUD0LC, where the audio
data is organized as shown below. For simplicity, "AUDxLC" in the Table below stands for
the combination of the two actual location registers (AUDxLCH and AUDxLCL). For the
audio DMA channels to be able to retrieve the data, the data address to which AUDOLC
points must be somewhere in chip RAM.
Table 5-1: Sample Audio Data Set for Channel 0
audiodata ---> AUD0LC * 100 98
2 ** 92 83
4 71 56
6 38 20
8 0 -20
10 -38 -56
12 -71 -83
14 -92 -83
16 -100 -98
18 -92 -83
20 -71 -56
22 -38 -20
24 0 20
26 38 56
28 71 83
30 92 98
NOTES
* Audio data is located on a word-address boundary.
** AUD0LC stands for AUD0LCL and AUD0LCH.
- Audio Hardware 135 -
Summary of Contents for Amiga A1000
Page 1: ...AMIGA HARDWARE REFERENCE MANUAL 1992 Commodore Business Machines Amiga 1200 PAL...
Page 20: ...Figure 1 1 Block Diagram for the Amiga Computer Family Introduction 11...
Page 21: ...12 Introduction...
Page 72: ...Figure 3 12 A dual Playfield display Playfield Hardware 63...
Page 87: ...Figure 3 24 Horizontal Scrolling 78 playfield hardware...
Page 101: ...92 Playfield Hardware...
Page 199: ...Figure 6 9 DMA time slot allocation 190 Blitter hardware...
Page 203: ...Figure 6 13 Blitter Block Diagram 194 Blitter Hardware...
Page 229: ...220 System Control Hardware...
Page 246: ...Figure 8 8 Chinon Timing diagram cont Interface Hardware 237...
Page 265: ...256 Interface Hardware...
Page 289: ...280 Appendix A...
Page 297: ...288 Appendix B...
Page 298: ...APPENDIX C CUSTOM CHIP PIN ALLOCATION LIST NOTE Means an active low signal Appendix C 289...
Page 302: ...APPENDIX D SYSTEM MEMORY MAP Appendix D 293...
Page 343: ...334 Appendix F...
Page 351: ...342 Appendix G...
Page 361: ...352 Appendix H...
Page 367: ...358 Appendix I...