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To form the color descriptor words, you first need to form a picture of the sprite, showing
the color of each pixel as a number from 0 - 3. Each number represents one of the colors
in the sprite's color registers. For example, here is the spaceship sprite again:
0000122332210000
0001223333221000
0012223333222100
0001223333221000
0000122332210000
Next, you translate each of the numbers in this picture into a binary number. The first line
in binary is shown below. The binary numbers are represented vertically with the low digit
in the top line and the high digit right below it. This is how the two color descriptor words
for each sprite line are written in memory.
0000100110010000 <---LowSpriteWord
0000011111100000 <---HighSpriteWord
The first line above becomes the color descriptor low word for line 1 of the sprite. The
second line becomes the color descriptor high word. In this fashion, you translate each
line in the sprite into binary 0s and 1s. See Figure 4-7. Each of the binary numbers
formed by the combination of the two data words for each line refers to a specific color
register in that particular sprite channel's segment of the color Table. Sprite channel 0, for
example, takes its colors from registers 17 - 19. The binary numbers corresponding to the
color registers for sprite DMA channel 0 are shown in Table 4-2.
Table 4-2: Sprite Color Registers
BINARY NUMBER COLOR REGISTER NUMBER
00 Transparent
01 17
10 18
11 19
Recall that binary 00 always means transparent and never refers to a color except
background.
END-OF-DATA WORDS
When the vertical position of the beam counter is equal to the VSTOP value in the sprite
control words, the next two words fetched from the sprite data structure are written into
the sprite control registers instead of being sent to the color registers. These two words
are interpreted by the
- Sprite Hardware 105 -
Summary of Contents for Amiga A1000
Page 1: ...AMIGA HARDWARE REFERENCE MANUAL 1992 Commodore Business Machines Amiga 1200 PAL...
Page 20: ...Figure 1 1 Block Diagram for the Amiga Computer Family Introduction 11...
Page 21: ...12 Introduction...
Page 72: ...Figure 3 12 A dual Playfield display Playfield Hardware 63...
Page 87: ...Figure 3 24 Horizontal Scrolling 78 playfield hardware...
Page 101: ...92 Playfield Hardware...
Page 199: ...Figure 6 9 DMA time slot allocation 190 Blitter hardware...
Page 203: ...Figure 6 13 Blitter Block Diagram 194 Blitter Hardware...
Page 229: ...220 System Control Hardware...
Page 246: ...Figure 8 8 Chinon Timing diagram cont Interface Hardware 237...
Page 265: ...256 Interface Hardware...
Page 289: ...280 Appendix A...
Page 297: ...288 Appendix B...
Page 298: ...APPENDIX C CUSTOM CHIP PIN ALLOCATION LIST NOTE Means an active low signal Appendix C 289...
Page 302: ...APPENDIX D SYSTEM MEMORY MAP Appendix D 293...
Page 343: ...334 Appendix F...
Page 351: ...342 Appendix G...
Page 361: ...352 Appendix H...
Page 367: ...358 Appendix I...