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xyneg:
neg.w d3 ; y was negative, in one of [5,6]
cmp.w d3,d2 ; is y>x?
bmi xynygtx ; if so, octant is 6
moveq.l #LINEMODE,d5 ; otherwise, octant is 5
bra lineagain
xynygtx:
exg d2,d3 ; X must be greater than Y
moveq.l #LINEMODE,d5 ; we are in octant 6
lineagain:
mulu.w d9,d1 ; Calculate y1 * width
ror.l #4,d0 ; move upper four bits into hi word
add.w d0,d0 ; multiply by 2
add.l d1,a0 ; ptr += (xl >> 3)
add.w d0,a0 ; ptr += yl * width
swap d0 ; get the four bits of xl
or.w #$BFA,d0 ; or with VSEA, USEC, USED, F=A+C
lsl.w #2,d3 ; y = 4 * y
add.w d2,d2 ; X = 2 * X
move.w d2,d1 ; set up size word
lsl.w #5,d1 ; shift five left
add.w #$42,d1 ; and add 1 to height, 2 to width
btst #DMAB_BLTDONE-8,DMACONR(al) ; safety check
waitblit:
btst #DMAB_BLTDONE-8,DMACONR(a1) ; wait for blitter
bne waitblit
move.w d3,BLTBMOD(a1) ; B mod = 4 * Y
sub.w d2,d3
ext.l d3
move.l d3,BLTAPT(a1) ; A ptr = 4 * Y - 2 * X
bpl lineover ; if negative
or.w #SIGNFLAG,d5 ; set sign bit in conl
lineover:
move.w d0,BLTCON0(a1) ; write control registers
move.w d5,BLTCON1(a1)
move.w d4,BLTCMOD(a1) ; C mod = bitplane width
move.w d4,BLTDMOD(a1) ; D mod = bitplane width
sub.w d2,d3
move.w d3,BLTAMOD(a1) ; A mod = 4 * Y - 4 * X
move.w #$8000,BLTADAT(a1) ; A data = 0x8000
moveq.l #-1,d5 ; Set masks to all ones
move.l d5,BLTAFWM(a1) ; we can hit both masks at once
move.l a0,BLTCPT(a1) ; Pointer to first pixel to set
move.l a0,BLTDPT(a1)
move.w d1,BLTSIZE(a1) ; Start blit
rts ; and return, blit still in progress.
- 198 Blitter Hardware -
Summary of Contents for Amiga A1000
Page 1: ...AMIGA HARDWARE REFERENCE MANUAL 1992 Commodore Business Machines Amiga 1200 PAL...
Page 20: ...Figure 1 1 Block Diagram for the Amiga Computer Family Introduction 11...
Page 21: ...12 Introduction...
Page 72: ...Figure 3 12 A dual Playfield display Playfield Hardware 63...
Page 87: ...Figure 3 24 Horizontal Scrolling 78 playfield hardware...
Page 101: ...92 Playfield Hardware...
Page 199: ...Figure 6 9 DMA time slot allocation 190 Blitter hardware...
Page 203: ...Figure 6 13 Blitter Block Diagram 194 Blitter Hardware...
Page 229: ...220 System Control Hardware...
Page 246: ...Figure 8 8 Chinon Timing diagram cont Interface Hardware 237...
Page 265: ...256 Interface Hardware...
Page 289: ...280 Appendix A...
Page 297: ...288 Appendix B...
Page 298: ...APPENDIX C CUSTOM CHIP PIN ALLOCATION LIST NOTE Means an active low signal Appendix C 289...
Page 302: ...APPENDIX D SYSTEM MEMORY MAP Appendix D 293...
Page 343: ...334 Appendix F...
Page 351: ...342 Appendix G...
Page 361: ...352 Appendix H...
Page 367: ...358 Appendix I...