Commodore Amiga A1000, Hardware Reference Manual

Page: 222 / 380

INTREQ
Interrupt request (status) - write only. Used by the processor to force a certain kind of
interrupt to be processed (software interrupt). Also used to clear interrupt request flags
once the interrupt process is completed.
INIEQR
Interrupt request (status) read - read only. Contains the bits that define which items are
requesting interrupt service.
The bit positions in the interrupt request register correspond directly to those same
positions in the interrupt enable register. The only difference between the read-only and
the write-only addresses shown above is bit 15 has no meaning in the read-only
addresses.
SETTING AND CLEARING BITS
Below are the meanings of the bits in the interrupt control registers and how you use
them.
SET AND CLEAR
The interrupt registers, as well as the DMA control register, use a special way of selecting
which of the bits are to be set or cleared. Bit 15 of these registers is called the SET/CLR
bit.
When you wish to set a bit (make it a 1), you must place a 1 in the position you want to
set and a 1 into position 15.
When you wish to clear a bit (make it a 0), you must place a 1 in the position you wish to
clear and a 0 into position 15.
Positions 14-0 are bit-selectors. You write a 1 to any one or more bits to select that bit. At
the same time you write a 1 or 0 to bit 15 to either set or clear the bits you have selected.
Positions 14-0 that have 0 value will not be affected when you do the write. If you want to
set some bits and clear others, you will have to write this register twice (once for setting
some bits, once for clearing others).
- System Control Hardware 213 -