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3. To use a function that is the inverse, or "not", of one of the
_
sources, such as A,
take all of the minterms not enclosed by the circle represented by
A on the above Figure. In this case, we have minterms 0, 1, 2, and 3.
Minterm Numbers 7 6 5 4 3 2 1 0
Selected Minterms 0 0 0 0 1 1 1 1
---------------
0 F equals $0F
4. To combine minterms, or "or" them, "or" the values together. For example, the
equation AB+BC becomes
Minterm Numbers 7 6 5 4 3 2 1 0
AB 1 1 0 0 0 0 0 0
BC 1 0 0 0 1 0 0 0
---------------
AB+BC 1 1 0 0 1 0 0 0
---------------
C 8 equals $C8
SHIFTS AND MASKS
Up to now we have dealt with the blitter only in moving words of memory around and
combining them with logic operations. This is sufficient for moving graphic images around,
so long as the images stay in the same position relative to the beginning of a word. If our
car image has its left-most pixel on the second pixel from the left, we can easily draw it
on the screen in any position where the leftmost pixel also starts two pixels from the
beginning of some word. But often we want to draw that car shifted left or right by a few
pixels. To this end, both the A and B DMA channels have a barrel shifter that can shift an
image between 0 and 15 bits.
This shifting operation is completely free; it requires no more time to execute a blit with
shifts than a blit without shifts, as opposed to shifting with the 68000. The shift is
normally towards the right. This shifter allows movement of images on pixel boundaries,
even though the pixels are addressed 16 at a time by each word address of the bit-plane
image.
So if the incoming data is shifted to the right, what is shifted in from the left? For the first
word of the blit, zeros are shifted in; for each subsequent word of the same blit, the data
shifted out from the previous word is shifted in.
The shift value for the A channel is set with bits 15 through 12 of BLTCON0; the B shift
value is set with bits 15 through 12 of BLTCON1. For most operations, the same value will
be used for both shifts. For shifts of greater than fifteen bits, load the address register
pointer of the destination with a higher address; a shift of 100 bits would require the
destination pointer to be advanced 100/16 or 6 words (12 bytes), and a right shift of the
remaining 4 bits to be used.
As an example, let us say we are doing a blit that is three words wide, two words high,
and we are using a shift of 4 bits. For simplicity, let us assume we are doing a straight
copy from A to D. The first word that will be written to D is the first word fetched from A,
shifted right four bits
- Blitter Hardware 173 -
Summary of Contents for Amiga A1000
Page 1: ...AMIGA HARDWARE REFERENCE MANUAL 1992 Commodore Business Machines Amiga 1200 PAL...
Page 20: ...Figure 1 1 Block Diagram for the Amiga Computer Family Introduction 11...
Page 21: ...12 Introduction...
Page 72: ...Figure 3 12 A dual Playfield display Playfield Hardware 63...
Page 87: ...Figure 3 24 Horizontal Scrolling 78 playfield hardware...
Page 101: ...92 Playfield Hardware...
Page 199: ...Figure 6 9 DMA time slot allocation 190 Blitter hardware...
Page 203: ...Figure 6 13 Blitter Block Diagram 194 Blitter Hardware...
Page 229: ...220 System Control Hardware...
Page 246: ...Figure 8 8 Chinon Timing diagram cont Interface Hardware 237...
Page 265: ...256 Interface Hardware...
Page 289: ...280 Appendix A...
Page 297: ...288 Appendix B...
Page 298: ...APPENDIX C CUSTOM CHIP PIN ALLOCATION LIST NOTE Means an active low signal Appendix C 289...
Page 302: ...APPENDIX D SYSTEM MEMORY MAP Appendix D 293...
Page 343: ...334 Appendix F...
Page 351: ...342 Appendix G...
Page 361: ...352 Appendix H...
Page 367: ...358 Appendix I...