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Additionally, you can use system hardware to detect collisions between objects and have
your program react to such collisions.
o Custom bit blitter used for high speed data movement, adaptable to bitplane animation.
The blitter has been designed to efficiently retrieve data from up to three sources,
combine the data in one of 256 different possible ways, and optionally store the combined
data in a destination area. This is one of the situations where the 68000 gives up memory
cycles to a DMA channel that can do the job more efficiently (see below). The bit blitter, in
a special mode, draws patterned lines into rectangularly organized memory regions at a
speed of about 1 million dots per second; and it can efficiently handle area fill.
o Audio consisting of four digital channels with independently programmable volume and
sampling rate. The audio channels retrieve their control and data via direct memory
access. Once started, each channel can automatically play a specified waveform without
further processor interaction. Two channels are directed into each of the two stereo audio
outputs. The audio channels may be linked together to provide amplitude or frequency
modulation or both forms of modulation simultaneously.
o DMA controlled floppy disk read and write on a full track basis. This means that the
built-in disk can read over 5600 bytes of data in a single disk revolution (11 sectors of
512 bytes each).
The internal memory shared by the custom chips and the 68000 CPU is also called "chip
memory". The original custom chips in the Amiga were designed to be able to physically
access up to 512K bytes of shared memory. The new version of the Agnus custom chip
was created which allows the graphics and audio hardware to access up to a full megabyte
of memory.
The Amiga 500 and 2000 models were designed to be able to accept the new Agnus
custom chip, called "Fat Agnus", due to its square shape. Hence, the A500 and A2000
have allocated a chip memory space of 1 MB. This entire 1 MB space is subject to the
arbitration logic that controls the CPU and custom chip accesses. On the A1000, only the
first 512K bytes of memory space is shared, chip memory.
These custom chips and the 68000 share memory on a fully interleaved basis. Since the
68000 only needs to access the memory bus during each alternate clock cycle in order to
run full speed, the rest of the time the memory bus is free for other activities. The custom
chips use the memory bus during these free cycles, effectively allowing the 68000 to run
at full rated speed most of the time. We say "most of the time" because there are some
occasions when the special purpose hardware steals memory cycles from the 68000, but
with good reason. Specifically, the coprocessor and the data moving DMA channel called
the blitter can each steal time from the 68000 for jobs they can do better than the 68000.
Thus, the system DMA channels are designed with maximum performance in mind. The
job to be done is performed by the most efficient hardware element available. Even when
such cycle stealing occurs, it only blocks the 68000's access to the internal, shared
memory. When using ROM or external memory, the 68000 always runs at full speed.
- 4 Introduction -
Summary of Contents for Amiga A1000
Page 1: ...AMIGA HARDWARE REFERENCE MANUAL 1992 Commodore Business Machines Amiga 1200 PAL...
Page 20: ...Figure 1 1 Block Diagram for the Amiga Computer Family Introduction 11...
Page 21: ...12 Introduction...
Page 72: ...Figure 3 12 A dual Playfield display Playfield Hardware 63...
Page 87: ...Figure 3 24 Horizontal Scrolling 78 playfield hardware...
Page 101: ...92 Playfield Hardware...
Page 199: ...Figure 6 9 DMA time slot allocation 190 Blitter hardware...
Page 203: ...Figure 6 13 Blitter Block Diagram 194 Blitter Hardware...
Page 229: ...220 System Control Hardware...
Page 246: ...Figure 8 8 Chinon Timing diagram cont Interface Hardware 237...
Page 265: ...256 Interface Hardware...
Page 289: ...280 Appendix A...
Page 297: ...288 Appendix B...
Page 298: ...APPENDIX C CUSTOM CHIP PIN ALLOCATION LIST NOTE Means an active low signal Appendix C 289...
Page 302: ...APPENDIX D SYSTEM MEMORY MAP Appendix D 293...
Page 343: ...334 Appendix F...
Page 351: ...342 Appendix G...
Page 361: ...352 Appendix H...
Page 367: ...358 Appendix I...