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HOW COLLISION DETECTION IS CONTROLLED
The collision control register, CLXCON, contains the bits that define certain characteristics
of collision detection. Its bits are shown in Table 7-4.
Table 7-4: CLXCON Bits
Bit
Number Name Function
15 ENSP7 Enable sprite 7 (OR with sprite 6)
14 ENSPS Enable sprite 5 (OR with sprite 4)
13 ENSP3 Enable sprite 3 (OR with sprite 2)
12 ENSP1 Enable sprite 1 (OR with sprite 0)
11 ENBP6 Enable bit-plane 6 (match required for collision)
10 ENBPS Enable bit-plane 5 (match required for collision)
9 ENBP4 Enable bit-plane 4 (match required for collision)
8 ENBP3 Enable bit-plane 3 (match required for collision)
7 ENBP2 Enable bit-plane 2 (match required for collision)
6 ENBP1 Enable bit-plane 1 (match required for collision)
5 MVBP6 Match value for bit-plane 6 collision
4 MVBPS Match value for bit-plane 5 collision
3 MVBP4 Match value for bit-plane 4 collision
2 MVBP3 Match value for bit-plane 3 collision
1 MVBP2 Match value for bit-plane 2 collision
0 MVBP1 Match value for bit-plane 1 collision
Bits 15-12 let you specify that collisions with a sprite pair are to include the odd-
numbered sprite of a pair of sprites. The even-numbered sprites always are included in
the collision detection. Bits 11-6 let you specify whether to include or exclude specific bit-
planes from the collision detection. Bits 5-0 let you specify the polarity (true-false
condition) of bits that will cause a collision. For example, you may wish to register
collisions only when the object collides with "something green2 or "something blue." This
feature, along with the collision enable bits, allows you to specify the exact bits, and their
polarity, for the collision to be registered.
NOTE
This register is write-only. If all bit-planes are excluded (disabled), then a bit-plane
collision will always be detected.
- System Control Hardware 209 -
Summary of Contents for Amiga A1000
Page 1: ...AMIGA HARDWARE REFERENCE MANUAL 1992 Commodore Business Machines Amiga 1200 PAL...
Page 20: ...Figure 1 1 Block Diagram for the Amiga Computer Family Introduction 11...
Page 21: ...12 Introduction...
Page 72: ...Figure 3 12 A dual Playfield display Playfield Hardware 63...
Page 87: ...Figure 3 24 Horizontal Scrolling 78 playfield hardware...
Page 101: ...92 Playfield Hardware...
Page 199: ...Figure 6 9 DMA time slot allocation 190 Blitter hardware...
Page 203: ...Figure 6 13 Blitter Block Diagram 194 Blitter Hardware...
Page 229: ...220 System Control Hardware...
Page 246: ...Figure 8 8 Chinon Timing diagram cont Interface Hardware 237...
Page 265: ...256 Interface Hardware...
Page 289: ...280 Appendix A...
Page 297: ...288 Appendix B...
Page 298: ...APPENDIX C CUSTOM CHIP PIN ALLOCATION LIST NOTE Means an active low signal Appendix C 289...
Page 302: ...APPENDIX D SYSTEM MEMORY MAP Appendix D 293...
Page 343: ...334 Appendix F...
Page 351: ...342 Appendix G...
Page 361: ...352 Appendix H...
Page 367: ...358 Appendix I...