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BEFORE AFTER EXCLUSIVE FILL
____________________ ___________________
| | | |
| 1 1 1 1 | | 1111 1111 |
| 1 1 1 1 | | 111 111 |
| 1 1 1 1 | | 11 11 |
| 11 11 | | 1 1 |
| 1 1 1 1 | | 11 11 |
| 1 1 1 1 | | 111 111 |
| 1 1 1 1 | | 1111 1111 |
|____________________| |___________________|
Figure 6-7: Single-Point Vertex Example
The blitter uses the fill carry-in bit as the starting fin state beginning at the right most
edge of each line. For each "1" bit in the source area, the blitter flips the fill state, either
filling or not filling the space with ones. This continues for each line until the left edge of
the blit is reached, at which point the filling stops.
BLITTER DONE FLAG
When the BLTSIZE register is written the blit is started. The processor does not stop while
the blitter is working, though; they can both work concurrently, and this provides much of
the speed evident in the Amiga. This does require some amount of care when using the
blitter.
A blitter done flag, also called the blitter busy flag, is provided as DMAF BLTDONE in
DMACONR. This flag is set when a blit is in progress.
NOTE
If a blit has just been started but has been locked out of memory access because of, for
instance, display fetches, this bit may not yet be set. The processor, on the other hand,
may be running completely uninhibited out of FAST memory or its internal cache, so it will
continue to have memory cycles.
- 180 Blitter Hardware -
Summary of Contents for Amiga A1000
Page 1: ...AMIGA HARDWARE REFERENCE MANUAL 1992 Commodore Business Machines Amiga 1200 PAL...
Page 20: ...Figure 1 1 Block Diagram for the Amiga Computer Family Introduction 11...
Page 21: ...12 Introduction...
Page 72: ...Figure 3 12 A dual Playfield display Playfield Hardware 63...
Page 87: ...Figure 3 24 Horizontal Scrolling 78 playfield hardware...
Page 101: ...92 Playfield Hardware...
Page 199: ...Figure 6 9 DMA time slot allocation 190 Blitter hardware...
Page 203: ...Figure 6 13 Blitter Block Diagram 194 Blitter Hardware...
Page 229: ...220 System Control Hardware...
Page 246: ...Figure 8 8 Chinon Timing diagram cont Interface Hardware 237...
Page 265: ...256 Interface Hardware...
Page 289: ...280 Appendix A...
Page 297: ...288 Appendix B...
Page 298: ...APPENDIX C CUSTOM CHIP PIN ALLOCATION LIST NOTE Means an active low signal Appendix C 289...
Page 302: ...APPENDIX D SYSTEM MEMORY MAP Appendix D 293...
Page 343: ...334 Appendix F...
Page 351: ...342 Appendix G...
Page 361: ...352 Appendix H...
Page 367: ...358 Appendix I...