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The addresses shown here are used by the special chips (called "Agnus", "Denise", and
"Paula") for transferring data among themselves. Also, the Copper uses these addresses
for writing to the special chip registers. To write to these registers with the 68000,
calculate the 68000 address using this formula:
68000 address = (chip address) + $DFF000
For example, for the 68000 to write to ADKCON (address = $09E), the address would be
$DFF09E. No other access address is valid. Unused registers must not be accessed
All bits marked as "unused" must be written as zeros. The value of any unused read bit
must not be trusted. Registers are either read-only or write-only. Reading a write-only
register will trash the register. Writing a read-only register will cause unexpected results.
All of the "pointer" type registers are organized as 32 bits on a long word boundary. These
registers may be written with one MOVE.L instruction. The lowest bit of all pointers must
be written as zero. The custom chips can only access CHIP memory; using a non-CHIP
address will fail (See the AllocMem() documentation or your compiler manual for more
information on CHIP memory). Disk data, sprite data, bitplane data, audio data, copper
lists and anything that will be blitted or accessed by custom chip DMA must be located in
chip memory.
When strobing any register which responds to either a read or a write, (for example
copjmp2) be sure to use a MOVE.W, not CLR.W. The CLR instruction causes a read and a
clear (two accesses) on a 68000, but only a single access on 68020 processors. This will
give different results on different processors.
- 258 Appendix A -
Summary of Contents for Amiga A1000
Page 1: ...AMIGA HARDWARE REFERENCE MANUAL 1992 Commodore Business Machines Amiga 1200 PAL...
Page 20: ...Figure 1 1 Block Diagram for the Amiga Computer Family Introduction 11...
Page 21: ...12 Introduction...
Page 72: ...Figure 3 12 A dual Playfield display Playfield Hardware 63...
Page 87: ...Figure 3 24 Horizontal Scrolling 78 playfield hardware...
Page 101: ...92 Playfield Hardware...
Page 199: ...Figure 6 9 DMA time slot allocation 190 Blitter hardware...
Page 203: ...Figure 6 13 Blitter Block Diagram 194 Blitter Hardware...
Page 229: ...220 System Control Hardware...
Page 246: ...Figure 8 8 Chinon Timing diagram cont Interface Hardware 237...
Page 265: ...256 Interface Hardware...
Page 289: ...280 Appendix A...
Page 297: ...288 Appendix B...
Page 298: ...APPENDIX C CUSTOM CHIP PIN ALLOCATION LIST NOTE Means an active low signal Appendix C 289...
Page 302: ...APPENDIX D SYSTEM MEMORY MAP Appendix D 293...
Page 343: ...334 Appendix F...
Page 351: ...342 Appendix G...
Page 361: ...352 Appendix H...
Page 367: ...358 Appendix I...