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A somewhat simplified method of determining the truth of the light pen value involves
instructing the system software to read the register only during the internal vertical
blanking period of 0<V20:
1. Read (long) VPOSR once, during the period of 0<V20.
2. Mask off the upper 15 bits of the 32-bit word and compare it with the hex value of
$10500 (V=261).
3. If the VPOSR value is greater than $10500, the light pen has not triggered since the
last top-of-screen. If the value is less, the light pen has triggered and the value read is
the screen position of the light pen.
Note that when the light pen latch is enabled, the VPOSR register may be latched at any
time, and cannot be relied on as a counter. This behavior may cause problems with
software that attempts to derive timing based on VPOSR ticks.
DIGITAL INPUT/OUTPUT ON THE CONTROLLER PORT
The Amiga can read and interpret many different and nonstandard controllers. The control
lines built into the POTGO register (address $DFF034) can redefine the functions of some
of the controller port pins.
Table 8-4 is the POTGO register bit description. POTGO ($DFF034) is the write-only
address for the pot control register. POTINP ($DFF016) is the read-only address for the
pot control register. The pot-control register controls a four-bit bidirectional VO port that
shares the same four pins as the four pot inputs.
Table 8-4: POTGO ($DFF034) and POTINP ($DFF016) Registers
Bit
Number Name Function
15 OUTRY Output enable for bit 14 (l=output)
14 DATRY data for port 2, pin 9
13 OUTRX Output enable for bit 12
12 DATRX data for port 2, pin 5
11 OUTLY Output enable for bit 10
10 DATLY data for port 1, pin 9 (right mouse button)
09 OUTLX Output enable for bit 8
08 DATLX data for port 1, pin 5 (middle mouse button)
07-01 X chip revision identification number
00 START Start pots (dump capacitors, start counters)
- 234 Interface Hardware -
Summary of Contents for Amiga A1000
Page 1: ...AMIGA HARDWARE REFERENCE MANUAL 1992 Commodore Business Machines Amiga 1200 PAL...
Page 20: ...Figure 1 1 Block Diagram for the Amiga Computer Family Introduction 11...
Page 21: ...12 Introduction...
Page 72: ...Figure 3 12 A dual Playfield display Playfield Hardware 63...
Page 87: ...Figure 3 24 Horizontal Scrolling 78 playfield hardware...
Page 101: ...92 Playfield Hardware...
Page 199: ...Figure 6 9 DMA time slot allocation 190 Blitter hardware...
Page 203: ...Figure 6 13 Blitter Block Diagram 194 Blitter Hardware...
Page 229: ...220 System Control Hardware...
Page 246: ...Figure 8 8 Chinon Timing diagram cont Interface Hardware 237...
Page 265: ...256 Interface Hardware...
Page 289: ...280 Appendix A...
Page 297: ...288 Appendix B...
Page 298: ...APPENDIX C CUSTOM CHIP PIN ALLOCATION LIST NOTE Means an active low signal Appendix C 289...
Page 302: ...APPENDIX D SYSTEM MEMORY MAP Appendix D 293...
Page 343: ...334 Appendix F...
Page 351: ...342 Appendix G...
Page 361: ...352 Appendix H...
Page 367: ...358 Appendix I...