10-2
MB86R02 ‘Jade-D’ Hardware Manual V1.64
10.3 Block diagram
Figure 10-1 shows block diagram of EXIRC.
IR
C0
(I
nt
er
ru
pt
Co
nt
ro
lle
r 0
)
EI_LEVEL
EI_ENABLE
EI_REQUEST 0
EI_REQUEST 1
EI_REQUEST 2
EI_REQUEST 3
EI
_D
O
UT
APB bus
INT_A[0]
IRQ10
INT_A[1]
IRQ11
INT_A[2]
IRQ12
INT_A[3]
IRQ13
EXIRC (External Interrupt Controller)
Figure 10-1 Block diagram of EXIRC
Table 10-1 shows block function included in EXIRC.
Table 10-1 Block function included in EXIRC
Block
Function
EI_ENABLE
Enabling external interrupt request for interrupt controller (IRC0)
EI_LEVEL
Setting input request level: "H" level/"L" level/rising edge/falling edge
EI_REQUEST
Synchronizing and maintaining interrupt request
EI_DOUT
Generating data for reading
10.4 Supply clock
APB clock is supplied to EXIRC. Refer to "5. Clock reset generator (CRG)" for frequency setting
and control specification of the clock.
Содержание MB86R02
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