25-11
MB86R02 ‘Jade-D’ Hardware Manual V1.64
25.7.8
PWMx current count register (PWMxCCR)
This register is to indicate current count value in BASECLK base.
Address
ch0
:
FFF 18
H
ch1
:
FFF 18
H
ch2
:
FFF 18
H
ch3
:
FFF 18
H
ch4
:
FFF 18
H
ch5
:
FFF 18
H
ch6
:
FFF 18
H
ch7
:
FFF 18
H
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Name
(Reserved)
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Initial value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
CCR[15:0]
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Initial value
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Bit field
Description
No.
Name
31-16
(Reserved)
Reserved bits.
Write access is ignored. The read value of these bits is always "0".
15-0
CCR
Current count value in BASECLK base is indicated.
CCR[15:0]
Duty cycle
0
0 BASECLK
1
1 BASECLK
|
|
65535
65535 BASECLK
Содержание MB86R02
Страница 24: ...MB86R02 Jade D Hardware Manual V1 64 ...
Страница 76: ...3 2 MB86R02 Jade D Hardware Manual V1 64 Figure 3 1 Memory map 1 ...
Страница 77: ...3 3 MB86R02 Jade D Hardware Manual V1 64 Figure 3 2 Memory map 2 ...
Страница 167: ...8 8 MB86R02 Jade D Hardware Manual V1 64 ...
Страница 214: ...11 7 MB86R02 Jade D Hardware Manual V1 64 15 16 cycles initial value ...
Страница 216: ...11 9 MB86R02 Jade D Hardware Manual V1 64 0000011 b 4MB 0111111 b 64MB 0000111 b 8MB 1111111 b 128MB ...
Страница 304: ...16 5 MB86R02 Jade D Hardware Manual V1 64 The flow of a read action is shown below Figure 16 5 Read process flow ...
Страница 497: ...18 139 MB86R02 Jade D Hardware Manual V1 64 VSYNC is output 1 dot clock faster than HSYNC ...
Страница 558: ...18 200 MB86R02 Jade D Hardware Manual V1 64 017 S S S S S S S S Int Frac 060 018 dBdy S S S S S S S S Int Frac ...
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Страница 682: ...22 2 MB86R02 Jade D Hardware Manual V1 00 FUJITSU PROPRIETARY AND CONFIDENTIAL ...
Страница 684: ...22 2 MB86R02 Jade D Hardware Manual V1 00 FUJITSU PROPRIETARY AND CONFIDENTIAL Figure 22 14 TCON flow diagram ...
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