403
Memory Cassette Functions
Section 6-6
• If a Memory Cassette is not mounted, data will be read from the flash
memory built into the CPU Unit to start operation regardless of the setting
of DIP switch pin SW2.
• CP1L CPU Units with 10, 14 or 20 I/O points. do not have D10000 to
D31999. These words will be treated as follows when data from a CPU
Unit with 10, 14 or 20 I/O points is transferred to a CPU Unit with 30, 40 or
60 I/O points or visa versa.
6-6-5
Procedures for Automatic Transfer from the Memory Cassette at
Startup
Copying the System
Use the following procedure to enable automatic transfer at startup.
1,2,3...
1.
Prepare a Memory Cassette containing the required data.
When transferring the data to the Memory Cassette, set the operating
mode after automatic transfer at startup to PROGRAM mode (default).
2.
With the power supply turned OFF to the CPU Unit, remove the cover from
the Memory Cassette slot and insert the Memory Cassette.
3.
Open the cover for the CPU Unit's PERIPHERAL section and set DIP
switch pin SW2 to ON.
4.
Turn ON the power supply to the CPU Unit.
5.
The automatic transfer from the Memory Cassette will begin. The rest of
the procedure assumes that the operating mode after automatic transfer at
startup to PROGRAM mode (default).
6.
After the automatic transfer has been completed, turn OFF the power sup-
ply to the CPU Unit.
7.
Remove the Memory Cassette, and replace the Memory Cassette slot cov-
er.
8.
Return the setting of DIP switch pin SW2 to OFF, and close the cover.
Protected by password. Over-
writing permitted and duplica-
tion prohibited.
No
Yes
Protected by password. Over-
writing and duplication both pro-
hibited.
No
Transfer enabled only at
startup.
Transferring data from a CPU Unit with
10, 14 or 20 I/O points to one with 30,
40 or 60 I/O points
“0000” will be written to D10000 to D31999
in the CPU Unit with 30, 40 or 60 I/O points.
Transferring data from a CPU Unit with
30, 40 or 60 I/O points to one with 10,
14 or 20 I/O points
D10000 to D31999 in the CPU Unit with 30,
40 or 60 I/O points will be ignored.
Type of protection
Transfer from CPU Unit
to Memory Cassette
Transfer from Memory
Cassette to CPU Unit
MEMORY
DIP switch pin
SW2 set to ON.
Summary of Contents for CP1L CPU UNIT - 03-2009
Page 1: ...Cat No W462 E1 06 CP1L CPU Unit SYSMAC CP Series CP1L L_0D_ CP1L M_0D_ OPERATION MANUAL...
Page 2: ......
Page 4: ...iv...
Page 10: ...x...
Page 22: ...xxii...
Page 34: ...xxxiv Conformance to EC Directives 6...
Page 70: ...36 Function Blocks Section 1 5...
Page 584: ...550 Trouble Shooting Section 8 7...
Page 627: ...593 Sample Application Section 9 12 Network Settings Network Tab Network Settings Driver Tab...
Page 630: ...596 Sample Application Section 9 12...
Page 654: ...620 Troubleshooting Unit Errors Section 11 4...
Page 662: ...628 Replacing User serviceable Parts Section 12 2...
Page 668: ...634 Standard Models Appendix A...
Page 698: ...664 Auxiliary Area Allocations by Function Appendix C...
Page 746: ...712 Auxiliary Area Allocations by Address Appendix D...
Page 773: ...739 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 774: ...740 Connections to Serial Communications Option Boards Appendix F...
Page 806: ...772 Index...
Page 808: ...774 Revision History...