Omron CP1L CPU UNIT - 03-2009, Operation Manual

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High-speed Counters Section 5-1
5-1-5 High-speed Counter Terminal Allocation
The following diagrams show the input terminals that can be used for high-
speed counters in each CPU Unit.
Differential Phases, Up/
Down, or Pulse + Direction Input Terminal Arrangement for CPU Units with 10 I/O Points
Input Terminal Arrangement for CPU Units with 14 I/O Points
Input Terminal Arrangement for CPU Units with 20 I/O Points
High-speed counter 0
(Phase B, Decrement,
or Direction input)
High-speed counter 1
(Phase B, Decrement,
or Direction input)
High-speed counter 1
(Phase Z or Reset input)
High-speed counter 0
(Phase A, Increment,
or Count input)
High-speed counter 1
(Phase A, Increment,
or Count input)
High-speed counter 0
(Phase Z or Reset input)
Upper Terminal Block
(Example: AC Power
Supply Modules)
L1 L2/N COM 01 03 05
00 02 04
Upper Terminal Block
(Example: AC Power
Supply Modules)
High-speed counter 0
(Phase A, Increment, or
Count input)
High-speed counter 0
(Phase B, Decrement, or
Direction input)
High-speed counter 0
(Phase Z or Reset input)
L1 L2/N CO M 0 1 03 05 07 NC N C
0 0 02 04 0 6 NC NC
High-speed counter 1
(Phase A, Increment, or
Count input)
High-speed counter 1
(Phase Z or Reset input)
High-speed counter 1
(Phase B, Decrement, or
Direction input)
High-speed counter 0
(Phase A, Increment, or
Count input)
High-speed counter 0
(Phase Z or Reset input)
High-speed counter 1
(Phase A, Increment, or
Count input)
High-speed counter 1
(Phase Z or Reset input)
High-speed counter 1
(Phase B, Decrement, or
Direction input)
L1 L2/N COM 01 0 3 05 07 09 11
00 0 2 04 06 0 8 10
High-speed counter 0
(Phase B, Decrement, or
Direction input)
Upper Terminal Block
(Example: AC Power
Supply Modules)