Omron CP1L CPU UNIT - 03-2009, Operation Manual

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Data Registers Section 4-12
Note Be sure to use PLC memory addresses in Index Registers.
4-12 Data Registers
The sixteen Data Registers (DR0 to DR15) are used to offset the PLC mem-
ory addresses in Index Registers when addressing words indirectly.
The value in a Data Register can be added to the PLC memory address in an
Index Register to specify the absolute memory address of a bit or word in I/O
memory. Data Registers contain signed binary data, so the content of an
Index Register can be offset to a lower or higher address.
D1001 and D1000
stored in IR0
or
Actual memory address of
CIO 0 (0000C000 hex)
stored in IR0
Contents of IR0 stored in
D01001 and D01000
D02001 and D02000
stored in IR0
or
Actual memory address
CIO 5 (0000C005 hex)
stored in IR0
Contents of IR0 stored in
D02001 and D02000
Peripheral servicing
Read D01001
and D01000 Read D02001
and D02000
IR storage words for task 2
IR storage words for task 1
or
or
Task 1
Task 2