348
Interrupt Functions
Section 6-1
Procedure
Note
The input interrupt (counter mode) function is one of the input interrupt func-
tions and executes an interrupt based on the pulse count. If the input pulse
frequency is too high, interrupts will occur too frequently and prevent normal
cyclic task processing. In this case, cycle time too long errors may occur or
the pulse input may not be read.
The maximum total frequency of the counter-mode interrupt inputs is 5 kHz.
Even in this case, the high frequencies may adversely affect other devices’
operation or the system load, so check the system’s operation thoroughly
before using the counters at high frequencies.
PLC Setup
The procedures for using the CX-Programmer to set the PLC Setup are the
same as the procedures for input interrupts (direct mode). Refer to
6-1-2 Input
Interrupts (Direct Mode)
for details.
Writing the Ladder
Program
MSKS(690) Settings
The MSKS(690) instruction must be executed in order to use input interrupts.
The settings made with MSKS(690) are enabled with just one execution, so in
general execute MSKS(690) in just one cycle using an up-differentiated condi-
tion.
MSKS(690) has the following two functions and three of the instructions are
used in combination. If up-differentiated input pulses are being used, the first
MSKS(690) instruction can be omitted since the input is set for up-differentia-
tion by default.
Select the input interrupts (counter
mode).
• Determine the inputs to be used for input
interrupts and corresponding task numbers.
↓
Wire the inputs.
• Wire the inputs.
↓
Set the PLC Setup.
• Use the CX-Programmer to select the inter-
rupt inputs in the PLC Setup.
↓
Set the counter SVs.
• Set the interrupt counter SVs in the corre-
sponding AR Area words.
↓
Write the ladder program.
• Write the programs for the corresponding
interrupt task numbers.
• Use MSKS(690) to specify up-differentiation
or down-differentiation.
• Use MSKS(690) to enable input interrupts (in
counter mode).
N
S
N
S
Execution condition
2. Enables or disables the input interrupt.
1. Specifies up-differentiated or
down-differentiated inputs.
MSKS(690)
MSKS(690)
Summary of Contents for CP1L CPU UNIT - 03-2009
Page 1: ...Cat No W462 E1 06 CP1L CPU Unit SYSMAC CP Series CP1L L_0D_ CP1L M_0D_ OPERATION MANUAL...
Page 2: ......
Page 4: ...iv...
Page 10: ...x...
Page 22: ...xxii...
Page 34: ...xxxiv Conformance to EC Directives 6...
Page 70: ...36 Function Blocks Section 1 5...
Page 584: ...550 Trouble Shooting Section 8 7...
Page 627: ...593 Sample Application Section 9 12 Network Settings Network Tab Network Settings Driver Tab...
Page 630: ...596 Sample Application Section 9 12...
Page 654: ...620 Troubleshooting Unit Errors Section 11 4...
Page 662: ...628 Replacing User serviceable Parts Section 12 2...
Page 668: ...634 Standard Models Appendix A...
Page 698: ...664 Auxiliary Area Allocations by Function Appendix C...
Page 746: ...712 Auxiliary Area Allocations by Address Appendix D...
Page 773: ...739 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 774: ...740 Connections to Serial Communications Option Boards Appendix F...
Page 806: ...772 Index...
Page 808: ...774 Revision History...