Omron CP1L CPU UNIT - 03-2009, Operation Manual

Page: 192 / 810

158
Timers and Counters Section 4-9
The refresh method for counter PVs can be set from the CX-Programmer to
either BCD or binary. (Refer to the previous page).
It is not recommended to use the same counter number in two counter
instructions because the counters will not operate correctly if they are count-
ing simultaneously. If two or more counter instructions use the same counter
number, an error will be generated during the program check, but the counters
will operate as long as the instructions are not executed in the same cycle.
The following table shows when counter PVs and Completion Flags will be
reset.
Forcing Bit Status Counter Completion Flags can be force-set and force-reset.
Counter PVs cannot be force-set or force-reset, although the PVs can be
refreshed indirectly by force-setting/resetting the Completion Flag.
Restrictions There are no restrictions in the order of using counter numbers or in the num-
ber of N.C. or N.O. conditions that can be programmed. Counter PVs can be
read as word data and used in programming.
Instruction name Effect on PV and Completion Flag
Reset Mode
change
PLC startup Reset Input CNR(545)/CN
RX(547)
Interlocks
(IL-ILC)
COUNTER:
CNT/CNTX(546) PV
→
0
Flag
→
OFF
Maintained Maintained Reset Reset Maintained
REVERSIBLE
COUNTER:
CNTR(012)/CNTRX(548)
COUNTER WAIT:
CNTW(814)/CNTWX(818)