
W O R K I N G W I T H T H E C P U
MemoryManagement Unit (MMU)
118
Hardware Reference NS9215
Translation
sequence for tiny
page references
Page translation involves one additional step beyond that of a section translation.
The first-level descriptor is the fine page table descriptor; this points to the first-
level descriptor.
Note:
The domain specified in the first-level description and access permissions
specified in the first-level description together determine whether the access
has permissions to proceed. See “Domain access control” on page 121 for
more information.
Subpages
You can define access permissions for subpages of small and large pages. If, during a
page table walk, a small or large page has a different subpage permission, only the
subpage being accessed is written into the TLB. For example, a 16 KB (large page)
subpage entry is written into the TLB if the subpage permission differs, and a 64 KB
entry is put in the TLB if the subpage permissions are identical.
31
14 13
0
Translation base
1
Translation table base
31
14 13
0
Translation base
2
Table index
0 0
31
20 19
0
Table index
Page index
First-level descriptor
31
0
Fine page table base address
2
1 1
1
3
4
5
Domain 1
31
0
Fine page table base address
Level two
table index
10 9
Modified virtual address
8
11
12
1
2
11
12
31
10 9
6 5 4 3 2 1 0
0
0
L2 table index
1
1
B
C
AP
Page base address
Page base address
31
0
10 9
Page index
Physical address
Second-level descriptor
Summary of Contents for NS9215
Page 1: ...NS9215 Hardware Reference 90000847_C Release date 10 April 2008...
Page 3: ......
Page 4: ......
Page 26: ...26 Hardware Reference NS9215...
Page 44: ...P I N O U T 26 5 System clock 44 Hardware Reference NS9215 System clock drawing...
Page 52: ...P I N O U T 26 5 Power and ground 52 Hardware Reference NS9215...
Page 80: ...I O C O N T ROL M O D U L E Memory Bus Configuration register 80 Hardware Reference NS9215...
Page 136: ...WOR KI N G W I TH T H E C P U Noncachable instruction fetches 136 Hardware Reference NS9215...
Page 202: ...S Y S T E M C O N T RO L M OD U L E RTC Module Control register 202 Hardware Reference NS9215...
Page 354: ...E X T E R N A L D M A DMA Peripheral Chip Select register 354 Hardware Reference NS9215...
Page 472: ...R E A L TI M E C L O C K M O D U L E General Status register 472 Hardware Reference NS9215...
Page 512: ...TI M I NG Clock timing 512 Hardware Reference NS9215...
Page 515: ...PA CKA GING Processor Dimensions www digiembedded com 515...
Page 516: ...PA CKA GING Processor Dimensions 516 Hardware Reference NS9215...