
W O R K I N G W I T H T H E C P U
MemoryManagement Unit (MMU)
110
Hardware Reference NS9215
First-level fetch
concatenation and
address
This address selects a 4-byte translation table entry. This is a first-level descriptor
for either a section or a page.
First-level
descriptor
The first-level descriptor returned is a section description, a coarse page table
descriptor, a fine page table descriptor, or is invalid. This is the format of a first-
level descriptor.
A section descriptor provides the base address of a 1 MB block of memory.
Page table
descriptors
The page table descriptors provide the base address of a page table that contains
second-level descriptors. There are two page-table sizes:
Coarse page tables, which have 256 entries and split the 1 MB that the table
describes into 4 KB blocks.
Fine page tables, which have 1024 entries and split the 1 MB that the table
describes into 1 KB blocks.
Modified virtual address
31
20 19
0
Table index
Translation table base
31
14 13
0
Translation base
31
14 13
0
Translation base
Table index
0
0
1
2
31
0
First-level descriptor
31
20 19
12 11 10
9
8
0
1
2
3
4
5
0
0
0
0
1
1
1
1
1
1
1
C
B
Domain
Domain
Domain
AP
Coarse page table base address
Section base address
Fine page table base address
Fault
Coarse page table
Section
Fine page table
Summary of Contents for NS9215
Page 1: ...NS9215 Hardware Reference 90000847_C Release date 10 April 2008...
Page 3: ......
Page 4: ......
Page 26: ...26 Hardware Reference NS9215...
Page 44: ...P I N O U T 26 5 System clock 44 Hardware Reference NS9215 System clock drawing...
Page 52: ...P I N O U T 26 5 Power and ground 52 Hardware Reference NS9215...
Page 80: ...I O C O N T ROL M O D U L E Memory Bus Configuration register 80 Hardware Reference NS9215...
Page 136: ...WOR KI N G W I TH T H E C P U Noncachable instruction fetches 136 Hardware Reference NS9215...
Page 202: ...S Y S T E M C O N T RO L M OD U L E RTC Module Control register 202 Hardware Reference NS9215...
Page 354: ...E X T E R N A L D M A DMA Peripheral Chip Select register 354 Hardware Reference NS9215...
Page 472: ...R E A L TI M E C L O C K M O D U L E General Status register 472 Hardware Reference NS9215...
Page 512: ...TI M I NG Clock timing 512 Hardware Reference NS9215...
Page 515: ...PA CKA GING Processor Dimensions www digiembedded com 515...
Page 516: ...PA CKA GING Processor Dimensions 516 Hardware Reference NS9215...