Mindray Passport 5-Lead, Service Manual

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Passport 5-Lead, 5L, LT, XG Service Manual 0070-00-0420 2 - 21
Theory of Operation Block Diagrams
This isolated voltage is used as is to supply the analog portion of the module. The digital
circuitry is provided with +5 volts (+5V) generated from the “+7.5" using a simple regulator,
U14. This voltage is also used to produce a +2.5v voltage, created by U13B, R19, and R34,
which is used as a reference throughout the module. The pressure tran5T excitation
voltage is generated by a tracking regulator, comprised of U13A, U12, and associated
parts. This voltage ”tracks" the +5v used as the reference voltage for the analog to digital
converter. As a result of doing this, variations of the reference and excitation voltage do not
impact the gain sensitivity (and therefore the measurement) of the pressure transducers,
because the conversion process of the analog to digital converter is linked ratiometrically to
it.
Isolated Microcontroller
For clarity, the isolated microcontroller block as well as the A/D converter and signal
isolation blocks, have been drawn together in the detailed block diagram of Fig. 10. This has
been done because of the close interaction of these blocks. The isolated microcontroller
block on the detailed block diagram consists of a 68HC05 device designated U22. This
device is entirely self-contained, requiring only power, clock and reset for operation. A
3.686 MHz clock is derived from crystal Y2, bias resistor R46, and loading capacitors C46
and C59, together with the internal oscillator circuit in U22. The internal processor clock is
actually this frequency divided by two. The crystal frequency is made available to other
devices on the board. The processor has an internal power-on reset circuit, although its
action is augmented by an external reset. The external reset signal is passed through the
isolation block. The microcontroller can drive its own reset input pin with an internal open-
drain device. This must be kept in mind when monitoring reset (pin 1 of U22). In this
application, the processor will attempt to drive the pin low when the internal reset circuit is
activated, which will occur for a brief time after power is applied. Internal detection of
certain failures can also cause the pin to be driven. However, the current software has these
detection mechanisms (COP and clock monitor) disabled.
The device has no external bus, but does feature four general purpose I/O ports. Of these,
port A is programmed as all outputs, and generates the temperature and ECG control lines.
Port B is set to all inputs, and samples the signals supplied by the level shift block. Port C is
set to six outputs and two inputs. The four uppermost bits control the respiration function.
The lower 2 bits are dedicated to the ADC interface. Because all of the on-chip peripherals
are enabled, none of the lines in port D are used for general purpose I/O. Four of these
lines, designated MISO, MOSI, SCK and SS comprise the synchronous serial interface
known as the SPI, which is used to communicate with the A/D converter. Two of the lines,
IRXD and ITXD, carry the serial data received from and transmitted to the isolation block.