GigaDevice Semiconductor GD32F20 Series, Руководство пользователя

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GD32F20x User Manual
209
- CAU is disabled by CAUEN=0 or the processing has been completed.
- No enough data or no enough space in the input/output FIFO to perform a data
block
1: CAU is processing data or key derivation.
3 OFU Output FIFO is full
0: Output FIFO is not full
1: Output FIFO is full
2 ONE Output FIFO is not empty
0: Output FIFO is empty
1: Output FIFO is not empty
1 INF Input FIFO is not full
0: Input FIFO is full
1: Input FIFO is not full
0 IEM Input FIFO is empty
0: Input FIFO is not empty
1: Input FIFO is empty
10.9.3. CAU data input register (CAU_DI)
Address offset: 0x08
Reset value: 0x0000 0000
The data input register is used to transfer plaintext or ciphertext blocks into the input FIFO for
processing. The MSB is firstly written into the FIFO and the LSB is the last one. If the CAUEN
is 0 and the input FIFO is not empty, when it is read, then the first data in the FIFO is popped
out and returned. If the CAUEN is 1, the returned value is undefined. Once it is read, then the
FIFO must be flushed.
This register has to be accessed by word (32-bit)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
DI[31:16]
rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
DI[15:0]
rw
Bits Fields Descriptions
31:0 DI[31:0] Data input
Write these bits will write data to IN FIFO, read these bits will return IN FIFO value
if CAUEN is 0, or it will return an undefined value