12. Serial RapidIO Registers > IDT-Specific RapidIO Registers
318
Tsi578 User Manual
June 6, 2016
Integrated Device Technology
www.idt.com
12.8.9
RapidIO Multicast Write Mask x Register
This register contains the set of egress ports where a multicast packet is sent when it matches the
destination ID associated with the mask. These bits form the multicast vector used by the broadcast
buffer to determine which egress ports the packet is copied to.
The bit descriptions apply to all packets received on a port whose destination ID field maps to the
multicast ID register value. A multicast packet received on an input port is sent to all egress ports
whose multicast select bit is set to 1. However, the multicast packet is not sent to the port from which it
was received, regardless of the setting of that port’s multicast select bit.
This registers is only located in the multicast engine.
Register name: RIO_MC_MSK{0..7}
Reset value: 0x0000_0000
Register offset: 10320, 10324, 10328, 1032C, 10330, 10334,
10338, 1033C
Bits
0
1
2
3
4
5
6
7
00:07
MC_MSK[15:8]
08:15
MC_MSK[7:0]
16:23
Reserved
24:31
Reserved
Bits
Name
Description
Type
Reset
Value
00:15
MC_MSK
Port x Multicast Select
Where x refers to ports 0 through 15. (Other values are reserved.)
0 = Do not Multicast the packet to output port x
1 = Multicast the packet to output port x
An output port is specified by the bit position:
Bit 0 = mask of output port 0
Bit 1 = mask of output port 1
...
R/W
0
16:31
Reserved
N/A
R
0
