IDT Tsi578, User Manual

Page: 260 / 527

12. Serial RapidIO Registers > RapidIO Logical Layer and Transport Layer Registers 260
Tsi578 User Manual
June 6, 2016
Integrated Device Technology
www.idt.com
12.5.13 RapidIO Route Configuration DestID CSR
This register and “RapidIO Route Configuration Output Port CSR” on page 261 operate together to
provide indirect read and write access to the destination ID lookup tables (LUTs).
Writes to the LUTs through these registers affect the LUTs of all ports on the device. Reads from these
registers always return the data from Port 0.
This register set is identical to “RapidIO Port x Route Config DestID CSR” on page 314 (Offset 10070)
and “RapidIO Port x Route Config Output Port CSR” on page 315 (Offset 10074), except that
“RapidIO Port x Route Config Output Port CSR” on page 315 are per-port configuration registers and
they include an auto-increment bit to increment the contents of SPx_ROUTE_CFG_DESTID after a
read or write operation.
For details on how to configure the LUTs using this register, refer to “Lookup Tables” on page 37 .
Register name: RIO_ROUTE_CFG_DESTID
Reset value: 0x0000_0000
Register offset: 0070
Bits 0 1 2 3 4 5 6 7
00:07 Reserved
08:15 Reserved
16:23 LRG_CFG_DEST_ID
24:31 CFG_DEST_ID
Bits Name Description Type
Reset
Value
0:15 Reserved Reserved R 0
16:23 LRG_CFG_
DEST_ID Large Configuration Destination ID
This field specifies the most significant byte of the destination ID used to
select an entry in the LUT, when the
“RapidIO Port x Route Config
Output Port CSR” on page 315 is read or written.
R/W 0x00
24:31 CFG_DEST_
ID Configuration Destination ID
This field specifies the destination ID used to select an entry in the LUT
when the
“RapidIO Port x Route Config Output Port CSR” on page 315
register is read or written.
R/W 0x00