Renesas H8S/2318 series, Hardware Manual

Page: 452 / 1121

Rev. 5.00, 12/03, page 422 of 1088
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Full-duplex communication capability
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The transmitter and receiver are mutually independent, enabling transmission and reception
to be executed simultaneously

Double-buffering is used in both the transmitter and the receiver, enabling continuous
transmission and continuous reception of serial data
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Choice of LSB-first or MSB-first transfer

Can be selected regardless of the communication mode* (except in the case of
asynchronous mode 7-bit data)
•
Built-in baud rate generator allows any bit rate to be selected
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Choice of serial clock source: internal clock from baud rate generator or external clock from
SCK pin
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Four interrupt sources

Four interrupt sources—transmit-data-empty, transmit-end, receive-data-full, and receive
error—that can issue requests independently

The transmit-data-empty and receive-data-full interrupts can activate the data transfer
controller (DTC) to execute data transfer
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Module stop mode can be set

As the initial setting, SCI operation is halted. Register access is enabled by exiting module
stop mode
Note: * Descriptions in this section refer to LSB-first transfer.