Renesas H8S/2318 series, Hardware Manual

Page: 579 / 1121

Rev. 5.00, 12/03, page 549 of 1088
16.3 Operation
When the RAME bit is set to 1, accesses to addresses H'FFDC00 to H'FFFBFF* are directed to the
on-chip RAM. When the RAME bit is cleared to 0, the off-chip address space is accessed.
Since the on-chip RAM is connected to the CPU by an internal 16-bit data bus, it can be written to
and read in byte or word units. Each type of access can be performed in one state.
Even addresses use the upper 8 bits, and odd addresses use the lower 8 bits. Word data must start
at an even address.
Note: * The amount of on-chip RAM is 16 kbytes in the H8S/2319C, 8 kbytes in the H8S/2319,
H8S/2318, H8S/2317, H8S/2316, H8S/2315, and H8S/2312S, 4 kbytes in the H8S/2314,
and 2 kbytes in the H8S/2313, H8S/2311, and H8S/2310.
16.4 Usage Note
DTC register information can be located in addresses H'FFF800 to H'FFFBFF. When the DTC is
used, the RAME bit must not be cleared to 0.