Rev. 5.00, 12/03, page 870 of 1088
(8) Block Transfer Instructions
Addressing Mode/
Instruction Length (Bytes)
Operand Size
#xx
Rn
@ERn
@(d,ERn)
@-ERn/@ERn+
@aa
@(d,PC)
@@aa
Mnemonic
EEPMOV
Notes:
1.
The number of states is the number of states required for execution when the instruction and its operands are located
in on-chip memory.
2.
n is the initial value of R4L or R4.
3.
Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.
[1]
Seven states for saving or restoring two registers, nine states for three registers, or eleven states for four registers.
[2]
Cannot be used in the chip.
[3]
Set to 1 when a carry or borrow occurs at bit 11; otherwise cleared to 0.
[4]
Set to 1 when a carry or borrow occurs at bit 27; otherwise cleared to 0.
[5]
Retains its previous value when the result is zero; otherwise cleared to 0.
[6]
Set to 1 when the divisor is negative; otherwise cleared to 0.
[7]
Set to 1 when the divisor is zero; otherwise cleared to 0.
[8]
Set to 1 when the quotient is negative; otherwise cleared to 0.
[9]
One additional state is required for execution when EXR is valid.
EEPMOV.B
4
EEPMOV.W
4
if R4L
≠
0
4+2n
*
2
Repeat @ER5
→
@ER6
ER5+1
→
ER5
ER6+1
→
ER6
R4L-1
→
R4L
Until R4L=0
else next;
if R4
≠
0
4+2n
*
2
Repeat @ER5
→
@ER6
ER5+1
→
ER5
ER6+1
→
ER6
R4-1
→
R4
Until R4=0
else next;
Operation
Condition Code
IH
N
Z
V
C
Advanced
No. of States
*
1
Summary of Contents for H8S/2318 series
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Page 901: ...Rev 5 00 12 03 page 871 of 1088 A 2 Instruction Codes Table A 2 shows the instruction codes...
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