Renesas H8S/2318 series, Hardware Manual

Page: 232 / 1121

Rev. 5.00, 12/03, page 202 of 1088
7.3.6 Repeat Mode
In repeat mode, one operation transfers one byte or one word of data.
From 1 to 256 transfers can be specified. Once the specified number of transfers have ended, the
initial state of the transfer counter and the address register specified as the repeat area is restored,
and transfer is repeated. In repeat mode the transfer counter value does not reach H'00, and
therefore CPU interrupts cannot be requested when DISEL = 0.
Table 7-7 lists the register information in repeat mode and figure 7-7 shows the memory map in
repeat mode.
Table 7-7 Register Information in Repeat Mode
Name Abbreviation Function
DTC source address register SAR Designates source address
DTC destination address register DAR Designates destination address
DTC transfer count register AH CRAH Holds number of transfers
DTC transfer count register AL CRAL Transfer counter
DTC transfer count register B CRB Not used
Transfer
SAR or
DAR DAR or
SAR
Repeat area
Figure 7-7 Memory Map in Repeat Mode