Renesas H8S/2318 series, Hardware Manual

Page: 189 / 1121

Rev. 5.00, 12/03, page 159 of 1088
6.4.3 Valid Strobes
Table 6-4 shows the data buses used and valid strobes for the access spaces.
In a read, the
RD
signal is valid without discrimination between the upper and lower halves of the
data bus.
In a write, the
HWR
signal is valid for the upper half of the data bus, and the
LWR
signal for the
lower half.
Table 6-4 Data Buses Used and Valid Strobes
Area
Access
Size Read/
Write
Address
Valid
Strobe Upper Data Bus
(D
15
to D
8
)
Lower Data Bus
(D
7
to D
0
)
Byte Read —
RD
Valid Invalid 8-bit access
space
Write —
HWR
Hi-Z
Byte Read Even
RD
Valid Invalid 16-bit access
space
Odd Invalid Valid
Write Even
HWR
Valid Hi-Z
Odd
LWR
Hi-Z Valid
Word Read —
RD
Valid Valid
Write —
HWR
,
LWR
Valid Valid
Notes: Hi-Z: High impedance
Invalid: Input state; input value is ignored.