Rev. 5.00, 12/03, page 917 of 1088
Instruction
XOR.L ERs,ERd
R:W 2nd
R:W NEXT
XORC #xx:8,CCR
R:W NEXT
XORC #xx:8,EXR
R:W 2nd
R:W NEXT
Reset exception
R:W VEC
R:W VEC+2
Internal operation,
R:W
*
5
handling
1 state
Interrupt exception
R:W
*
6
Internal operation,
W:W stack (L)
W:W stack (H)
W:W stack (EXR)
R:W:M VEC
R:W VEC+2
Internal operation,
R:W
*
7
handling
1 state
1 state
Notes:
1.
EAs is the contents of ER5. EAd is the contents of ER6.
2.
EAs is the contents of ER5. EAd is the contents of ER6. Both registers are incremented by 1 after execution of the instruct
ion. n is the ini
tial
value of R4L or R4. If n = 0, these bus cycles are not executed.
3.
Repeated two times to save or restore two registers, three times for three registers, or four times for four registers.
4.
Start address after return.
5.
Start address of the program.
6.
Prefetch address, equal to two plus the PC value pushed onto the stac
k. In recovery from sleep mode or software standby mod
e the read
operation is replaced by an internal operation.
7.
Start address of the interrupt handling routine.
8.
Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.
1
2
3
4
5 6 7 8 9
Summary of Contents for H8S/2318 series
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Page 901: ...Rev 5 00 12 03 page 871 of 1088 A 2 Instruction Codes Table A 2 shows the instruction codes...
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