Rev. 5.00, 12/03, page 524 of 1088
Group
Selection
Channel Selection
Description
CH2
CH1
CH0
Single Mode (SCAN = 0) Scan Mode (SCAN = 1)
0
0
0
AN0 (Initial value)
AN0
1
AN1
AN0, AN1
1
0
AN2
AN0 to AN2
1
AN3
AN0 to AN3
1
0
0
AN4
AN4
1
AN5
AN4, AN5
1
0
AN6
AN4 to AN6
1
AN7
AN4 to AN7
14.2.3
A/D Control Register (ADCR)
Bit
:
7
6
5
4
3
2
1
0
TRGS1
TRGS0
—
—
CKS1
—
—
—
Initial value :
0
0
1
1
1
1
1
1
R/W
:
R/W
R/W
—
—
R/W
R/W
—
—
ADCR is an 8-bit readable/writable register that enables or disables external triggering of A/D
conversion operations.
ADCR is initialized to H'3F by a reset, and in standby mode or module stop mode.
Bits 7 and 6—Timer Trigger Select 1 and 0 (TRGS1, TRGS0): These bits select enabling or
disabling of the start of A/D conversion by a trigger signal. Only set bits TRGS1 and TRGS0
while conversion is stopped (ADST = 0).
Bit 7
TRGS1
Bit 6
TRGS0
Description
0
0
A/D conversion start by external trigger is disabled
(Initial value)
1
A/D conversion start by external trigger (TPU) is enabled
1
0
A/D conversion start by external trigger (8-bit timer) is enabled
1
A/D conversion start by external trigger pin (
ADTRG
) is enabled
Summary of Contents for H8S/2318 series
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