Renesas H8S/2318 series, Hardware Manual

Page: 816 / 1121

Rev. 5.00, 12/03, page 786 of 1088
Table 19-3 MSTP Bits and Corresponding On-Chip Supporting Modules
Register Bit Module
MSTPCRH MSTP15 —
MSTP14 Data transfer controller (DTC)
MSTP13 16-bit timer-pulse unit (TPU)
MSTP12 8-bit timer module
MSTP11 —
MSTP10 D/A converter (channels 0 and 1)
MSTP9 A/D converter
MSTP8 —
MSTPCRL MSTP7 —
MSTP6 Serial communication interface (SCI) channel 1
MSTP5 Serial communication interface (SCI) channel 0
MSTP4 —
MSTP3 —
MSTP2 —
MSTP1 —
MSTP0 —
Note: Bits 15, 11, 8, 7, and 4 to 0 can be read or written to, but do not affect operation.
19.5.2 Usage Notes
DTC Module Stop: Depending on the operating status of the DTC, the MSTP14 bit may not be
set to 1. Setting of the DTC module stop mode should be carried out only when the module is not
activated.
For details, refer to section 7, Data Transfer Controller.
On-Chip Supporting Module Interrupts: Relevant interrupt operations cannot be performed in
module stop mode. Consequently, if module stop mode is entered when an interrupt has been
requested, it will not be possible to clear the CPU interrupt source or the DTC activation source.
Interrupts should therefore be disabled before entering module stop mode.
Writing to MSTPCR: MSTPCR should only be written to by the CPU.