Rev. 5.00, 12/03, page 783 of 1088
19.2.3
Module Stop Control Register (MSTPCR)
MSTPCRH
MSTPCRL
Bit
:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Initial value :
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R/W
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
MSTPCR is a 16-bit readable/writable register that performs module stop mode control.
MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 15 to 0—Module Stop (MSTP 15 to MSTP 0): These bits specify module stop mode. See
table 19-3 for the method of selecting on-chip supporting modules.
Bits 15 to 0
MSTP15 to MSTP0
Description
0
Module stop mode cleared
1
Module stop mode set
Summary of Contents for H8S/2318 series
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