Renesas H8S/2318 series, Hardware Manual

Page: 864 / 1121

Rev. 5.00, 12/03, page 834 of 1088
register 1 (FLMCR1) is set. In the H8S/2319, indicates the total time during which the
P1 bit and P2 bit in the flash memory control registers (FLMCR1, FLMCR2) are set.
Does not include the program-verify time.)
3. Time to erase one block. (In the H8S/2318, H8S/2317, H8S/2315, and H8S/2314,
indicates the total time during which during which the E1 bit in FLMCR1 and the E2 bit
in FLMCR2 are set. Does not include the erase-verify time.)
4. Maximum programming time
wait time after P bit setting (z)
N
t
P
(max) =
i=1
5. The maximum number of writes (N) should be set as shown below according to the
actual set value of z so as not to exceed the maximum programming time (t
P
(max)).
The wait time after P bit setting (z) should be changed as follows according to the
number of writes (n).
Number of writes (n)
1
≤
n
≤
6 z = 30
µ
s
7
≤
n
≤
1000 z = 200
µ
s
[In additional programming]
Number of writes (n)
1
≤
n
≤
6 z = 10
µ
s
6. For the maximum erase time (t
E
(max)), the following relationship applies between the
wait time after E bit setting (z) and the maximum number of erases (N):
t
E
(max) = Wait time after E bit setting (z)
×
maximum number of erases (N)