Renesas H8S/2318 series, Hardware Manual

Page: 418 / 1121

Rev. 5.00, 12/03, page 388 of 1088
Bit 7—Compare Match Interrupt Enable B (CMIEB): Selects whether CMFB interrupt
requests (CMIB) are enabled or disabled when the CMFB flag in TCSR is set to 1.
Bit 7
CMIEB
Description
0 CMFB interrupt requests (CMIB) are disabled (Initial value)
1 CMFB interrupt requests (CMIB) are enabled
Bit 6—Compare Match Interrupt Enable A (CMIEA): Selects whether CMFA interrupt
requests (CMIA) are enabled or disabled when the CMFA flag in TCSR is set to 1.
Bit 6
CMIEA
Description
0 CMFA interrupt requests (CMIA) are disabled (Initial value)
1 CMFA interrupt requests (CMIA) are enabled
Bit 5—Timer Overflow Interrupt Enable (OVIE): Selects whether OVF interrupt requests
(OVI) are enabled or disabled when the OVF flag in TCSR is set to 1.
Bit 5
OVIE
Description
0 OVF interrupt requests (OVI) are disabled (Initial value)
1 OVF interrupt requests (OVI) are enabled
Bits 4 and 3—Counter Clear 1 and 0 (CCLR1 and CCLR0): These bits select the method by
which TCNT is cleared: by compare match A or B, or by an external reset input.
Bit 4
CCLR1 Bit 3
CCLR0
Description
0 0 Clearing is disabled (Initial value)
1 Clear by compare match A
1 0 Clear by compare match B
1 Clear by rising edge of external reset input
Bits 2 to 0—Clock Select 2 to 0 (CKS2 to CKS0): These bits select whether the clock input to
TCNT is an internal or external clock.
Three internal clocks can be selected, all divided from the system clock (
φ
):
φ
/8,
φ
/64, and
φ
/8192.
The falling edge of the selected internal clock triggers the count.