Rev. 5.00, 12/03, page 966 of 1088
PFDDR—Port F Data Direction Register
H'FEBE
Port F
7
PF7DDR
1
W
0
W
6
PF6DDR
0
W
0
W
5
PF5DDR
0
W
0
W
4
PF4DDR
0
W
0
W
3
PF3DDR
0
W
0
W
0
PF0DDR
0
W
0
W
2
PF2DDR
0
W
0
W
1
PF1DDR
0
W
0
W
Specify input or output for individual port F pins
Bit
Modes 4 to 6
*
Initial value
Read/Write
Mode 7
*
Initial value
Read/Write
:
:
:
:
:
Note:
*
Modes 6 and 7 cannot be used in the ROMless versions.
PGDDR—Port G Data Direction Register
H'FEBF
Port G
7
Undefined
Undefined
6
Undefined
Undefined
5
Undefined
Undefined
4
PG4DDR
1
W
0
W
3
PG3DDR
0
W
0
W
0
PG0DDR
0
W
0
W
2
PG2DDR
0
W
0
W
1
PG1DDR
0
W
0
W
Specify input or output for individual port G pins
Note:
*
Modes 6 and 7 cannot be used in the ROMless versions.
Bit
Modes 4 and 5
Initial value
Read/Write
Modes 6 and 7
Initial value
Read/Write
:
:
:
*
:
:
Summary of Contents for H8S/2318 series
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Page 901: ...Rev 5 00 12 03 page 871 of 1088 A 2 Instruction Codes Table A 2 shows the instruction codes...
Page 1121: ...H8S 2319 Group H8S 2318 Group Hardware Manual REJ09B0089 0500O...
