Renesas H8S/2318 series, Hardware Manual

Page: 1034 / 1121

Rev. 5.00, 12/03, page 1004 of 1088
SMR1—Serial Mode Register 1 H'FF80 Smart Card Interface 1
7
GM
0
R/W
6
BLK
0
R/W
5
PE
0
R/W
4
O/
E
0
R/W
3
BCP1
0
R/W
0
CKS0
0
R/W
2
BCP0
0
R/W
1
CKS1
0
R/W
0
1
Normal smart card interface mode operation
· TEND flag generated 12.5 etu (11.5 etu in block transfer mode) after beginning of start bit
· Clock output on/off control only
GSM mode smart card interface mode operation
· TEND flag generated 11.0 etu after beginning of start bit
· Fixed high/low-level control possible (set in SCR) in addition to clock output on/off control
GSM Mode
0
1
Setting prohibited
Parity bit addition and checking enabled *
Parity Enable
0
1
Even parity
* 1
Odd parity
* 2
Parity Mode
(Set to 1 when using the smart card interface)
0
1
0
1
0
1
φ
clock
φ
/4 clock
φ
/16 clock
φ
/64 clock
Clock Select
Bit
Initial value
Read/Write
:
:
:
Note: etu (Elementary Time Unit): Time for transfer of 1 bit
0
1
0
1
0
1
32 clocks
64 clocks
372 clocks
256 clocks
Base Clock Pulse
BCP1 BCP0 Base Clock Pulse
0
1
Normal smart card interface mode
Block transfer mode
Block Transfer Mode Select
1. When even parity is selected, the parity bit added to
transmit data makes an even number of 1s in the
transmitted character and parity bit combined. Receive
data must have an even number of 1s in the received
character and parity bit combined.
2. When odd parity is selected, the parity bit added to
transmit data makes an odd number of 1s in the
transmitted character and parity bit combined. Receive
data must have an odd number of 1s in the received
character and parity bit combined.
Notes:
* When the PE bit is set to 1, the parity (even or odd) specified by
the O/
E
bit is added to transmit data before transmission. In
reception, the parity bit is checked for the parity (even or odd)
specified by the O/
E
bit.
Note: