Renesas H8S/2318 series, Hardware Manual

Page: 199 / 1121

Rev. 5.00, 12/03, page 169 of 1088
Figure 6-14 shows an example of wait state insertion timing.
By program wait
T
1
Address bus
φ
AS
RD
Data bus
Read data
Read
HWR
,
LWR
Write data
Write
Note: indicates the timing of
WAIT
pin sampling.
WAIT
Data bus
T
2
T
w
T
w
T
w
T
3
By
WAIT
pin
Figure 6-14 Example of Wait State Insertion Timing
The settings after a power-on reset are: 3-state access, 3 program wait state insertion, and WAIT
input disabled.