Renesas H8S/2318 series, Hardware Manual

Page: 809 / 1121

Rev. 5.00, 12/03, page 779 of 1088
19.2 Register Descriptions
19.2.1 Standby Control Register (SBYCR)
Bit : 7 6 5 4 3 2 1 0
SSBY STS2 STS1 STS0 OPE — — IRQ37S
Initial value : 0 0 0 0 1 0 0 0
R/W : R/W R/W R/W R/W R/W — — R/W
SBYCR is an 8-bit readable/writable register that performs software standby mode control.
SBYCR is initialized to H'08 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7—Software Standby (SSBY): Specifies a transition to software standby mode. Remains set
to 1 when software standby mode is released by an external interrupt, and a transition is made to
normal operation. The SSBY bit should be cleared by writing 0 to it.
Bit 7
SSBY
Description
0 Transition to sleep mode after execution of SLEEP instruction (Initial value)
1 Transition to software standby mode after execution of SLEEP instruction
Bits 6 to 4—Standby Timer Select 2 to 0 (STS2 to STS0): These bits select the time the MCU
waits for the clock to stabilize when software standby mode is cleared by an external interrupt.
With crystal oscillation, refer to table 19-4 and make a selection according to the operating
frequency so that the standby time is at least 8 ms (the oscillation stabilization time). With an
external clock, any selection can be made*.
Note: * Except in the F-ZTAT versions.