198
/
838
Nations Technologies Inc.
Tel
:
+86-755-86309900
:
Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North.
Nanshan District, Shenzhen, 518057, P.R.China
Bit field
Name
Description
1: Enable half transfer interrupt of channel x.
1
TXCIE
Transfer complete interrupt enable.
Software can enable/disable transfer complete interrupt.
0: Disable transfer complete interrupt of channel x
.
1: Enable transfer complete interrupt of channel x.
0
CHEN
Channel enable.
Software can set/reset this bit
.
0: Disable channel.
1: Enable channel.
8.5.5
DMA channel x transfer number register (DMA_TXNUMx)
The x is channel number, x = 1…8
Address offset: 0x0c+20 * (x–1)
Reset value: 0x0000 0000
This register can only be written if the channel is disabled (DMA_CHCFGx.CHEN = 0).
Bit field
Name
Description
31:16
Reserved
Reserved, the reset value must be maintained.
15:0
NDTX
Number of data to transfer.
Number of data to be transferred (0
~
65535). Software can read/write the number of
transfers when channel is disable and it will be read only after channel enable. Every
successful transfer of corresponding DMA channel will decrease this register by 1. If
circular mode is enable, it will automatically reload pre-set value when it reach zero.
Otherwise it will keep at zero and reset channel enable.
8.5.6
DMA channel x peripheral address register (DMA_PADDRx)
The x is channel number, x = 1…8
Address offset: 0x10+20 * (x–1)
Reset value: 0x0000 0000
This register can only be written if the channel is disabled (DMA_CHCFGx.CHEN = 0).