Nations N32G45 Series, User Manual

Page: 169 / 838

169 / 838
Nations Technologies Inc.
Tel
：
+86-755-86309900
Email
：
info@nationstech.com
Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North.
Nanshan District, Shenzhen, 518057, P.R.China
Bit field Name Description
16 TIM5CH4_RMP TIM5_CH4 internal remapping
This bit can be set to '1' or set to '0' by software. It controls the internal image of
TIM5_CH4.
0: TIM5_CH4 is connected to PA3
1: LSI internal oscillator is connected to TIM5_CH4, the purpose is to calibrate
the LSI
15 PD01_RMP PD0/PD1 mapping on OSC_IN/OSC_OUT (PD0/PD1 mapping on
OSC_IN/OSC_OUT)
This bit can be set to '1' or set to '0' by software. It controls the GPIO function
image of PD0 and PD1. When the main oscillator HSE is not used (the system
runs on the internal 8MHz RC oscillator), PD0 and PD1 can be mapped to the
OSC_IN and OSC_OUT pins. This function can only be applied to packages with
pins below 80 (PD0 and PD1 appear on packages with pins 80 and above and do
not need to be remapped).
0: Do not remap PD0 and PD1;
1: PD0 is mapped to OSC_IN, PD1 is mapped to OSC_OUT.
14:13 CAN1_RMP[1:0] CAN1 alternate function remapping
These bits can be set to '1' or set to '0' by software to control the re-mapping of
the alternate functions CAN1_RX and CAN1_TX on products with only a single
CAN1 interface.
00: CAN1_RX is mapped to PA11, CAN1_TX is mapped to PA12;
01: CAN1_RX is mapped to PD8, CAN1_TX is mapped to PD9;
10: CAN1_RX is mapped to PB8, CAN1_TX is mapped to PB9 (cannot be used
for 36-pin package);
11: CAN1_RX is mapped to PD0, CAN1_TX is mapped to PD1.
12 TIM4_RMP Remapping of Timer 4
This bit can be set to '1' or set to '0' by software to control the mapping of
channels 1-4 of TIM4 to the GPIO port.
0: No remapping (TIM4_CH1/PB6, TIM4_CH2/PB7, TIM4_CH3/PB8,
TIM4_CH4/PB9);
1: Full image (TIM4_CH1/PD12, TIM4_CH2/PD13, TIM4_CH3/PD14,
TIM4_CH4/PD15).
Note: Remapping does not affect TIM4_ETR on PE0.
11:10 TIM3_RMP[1:0] Remapping of Timer 3
These bits can be set to '1' or set to '0' by software to control the image of Timer 3
channels 1 to 4 on the GPIO port.
00: no remapping (CH1/PA6, CH2/PA7, CH3/PB0, CH4/PB1);
01: unused combination;
10: Partial image (CH1/PB4, CH2/PB5, CH3/PB0, CH4/PB1);
11: Full image (CH1/PC6, CH2/PC7, CH3/PC8, CH4/PC9).
Note: Remapping does not affect TIM3_ETR on PD2.
9:8 TIM2_RMP[1:0] Remapping of Timer 2