Nations N32G45 Series, User Manual

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Nations Technologies Inc.
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+86-755-86309900
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info@nationstech.com
Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North.
Nanshan District, Shenzhen, 518057, P.R.China
Bit field Name Description
Set to 1 after power-on reset or data to be sent has been sent to the shift register. Setting
USART_CTRL1.TXDEIEN will generate an interrupt.
This bit is cleared to 0 when the software writes the data to be sent into USART_DAT.
0: Send data buffer is not empty.
1: The transmitting data buffer is empty.
6 TXC Transmission complete.
This bit is set to 1 after power-on reset. If USART_STS.TXDE is set, this bit is set when
the current data transmission is completed.
Setting USART_CTRL1.TXCIEN bit will generate an interrupt.
This bit is cleared by software.
0: Transmitting did not complete.
1: Send completed.
5 RXDNE The Read data register not empty.
This bit is set when the read data buffer receives data from the shift register. When
USART_CTRL1.RXDNEIEN bit is set, an interrupt will be generated.
Software can clear this bit by writing 0 to it or reading the USART_DAT register.
0: The read data buffer is empty.
1: The read data buffer is not empty.
4 IDLEF IDLE line detected flag.
Within one frame time, the idle state is detected at the RX pin, and this bit is set to 1.
When USART_CTRL1.IDLEIEN bit is set, an interrupt will be generated.
The software can clear this bit by reading USART_STS first and then reading
USART_DAT.
0: No idle frame detected.
1: idle frame detected.
Note: IDLEF bit will not be set high again until USART_STS.RXDNE bit is set (that is,
an idle line is detected again).
3 OREF Overrun error
With RXDNE set, this bit is set if the USART_DAT register receives data from the shift
register. When USART_CTRL3.ERRIEN bit is set, an interrupt will be generated.
The software can clear this bit by reading USART_STS first and then reading
USART_DAT.
0: No overrun error was detected.
1: Overflow error detected.
2 NEF Noise error flag.
When noise is detected in the received frame, this bit is set by hardware. It is cleared by
the software sequence (read first USART_STS, read USART_DAT again).
0: No noise error detected.
1: Noise error detected.
Note: this bit will not generate an interrupt because it appears with
USART_STS.RXDNE, and the hardware will generate an interrupt when setting the
USART_STS.RXDNE flag. In the multi-buffer communication mode, if the