Nations N32G45 Series, User Manual

Page: 255 / 838

255 / 838
Nations Technologies Inc.
Tel
：
+86-755-86309900
Email
：
info@nationstech.com
Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North.
Nanshan District, Shenzhen, 518057, P.R.China
10.4.7 Synchronous trigger without waveform generator
The configuration process is as follows:

Configure DAC_CTRL.T1EN and DAC_CTRL.T2EN to enable trigger enable of DAC1 and DAC2.

Configure DAC_CTRL.T1SEL[2:0] and DAC_CTRL.T2SEL[2:0] to be the same value to select the same
trigger source.

Put the data to be converted into the corresponding alignment data holding register.
When a trigger event occurs, the value of the alignment data holding register of DAC1 will be transferred to the
register DAC_DATO1 after a delay of 3 APB1 clock cycles; the value of the alignment data holding register of DAC2
will be transferred to the register DAC_DATO2 after a delay of 3 APB1 clock cycles.
10.4.8 Synchronous triggers that generate the same noise
The configuration process is as follows:

Configure DAC_CTRL.T1EN and DAC_CTRL.T2EN to enable trigger enable of DAC1 and DAC2.

Configure DAC_CTRL.T1SEL[2:0] and DAC_CTRL.T2SEL[2:0] to be the same value to select the same
trigger source.
 Configure DAC_CTRL.W1EN[1:0] and DAC_CTRL.W2EN[1:0] as “01” to select noise generation enable.

Configure DAC_CTRL.MA1SEL3:0] and DAC_CTRL.MA2SEL3:0] to the same value to get the same LFSR
register mask bit.

Put the data to be converted into the corresponding alignment data holding register.
When a trigger event occurs, the counter value of LFSR register 1 is added to the value of the corresponding data
holding register. The added value is transferred to register DAC_DATO1 after a delay of 3 APB1 clock cycles, and
the counter value of LFSR register 1 will be updated at this time; LFSR The counter value of register 2 is added to
the value of the corresponding data holding register. The added value is transferred to register DAC_DATO2 after a
delay of 3 APB1 clock cycles, and the counter value of LFSR register 2 will be updated at this time.
10.4.9 Synchronous triggers that generate different noises
The configuration process is as follows:

Configure DAC_CTRL.T1EN and DAC_CTRL.T2EN to enable trigger enable of DAC1 and DAC2.

Configure DAC_CTRL.T1SEL[2:0] and DAC_CTRL.T2SEL[2:0] as different values to select different trigger
sources.

Configure DAC_CTRL.W1EN[1:0] and DAC_CTRL.W2EN[1:0] as “01” to select noise generation enable.

Configure DAC_CTRL.MA1SEL3:0] and DAC_CTRL.MA2SEL3:0] to the same value to get the same LFSR
register mask bit.

Put the data to be converted into the corresponding alignment data holding register.