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Nations Technologies Inc.
Tel
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+86-755-86309900
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Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North.
Nanshan District, Shenzhen, 518057, P.R.China
as follows to start timestamp operation:
1.
Set ETH_MACINTMSK.TSIM to 1 to mask timestamp trigger interrupt;
2.
Set ETH_PTPTSCTRL.TSENA to 1 to enable timestamp;
3.
Set sub-second increment register to configure clock precision;
4.
If choose coarse adjustment and calibration, skip directly to step 7; if choose fine adjustment and calibration,
first configure timestamp adder register ETH_PTPTSADD, and then set ETH_PTPTSCTRL.TSADDREG to
enable the update of timestamp adder register;
5.
Query and wait for ETH_PTPTSCTRL.TSADDREG to become 0;
6.
Set ETH_PTPTSCTRL.TSCFUPDT to 1, and update system timestamp with fine adjustment and calibration;
7.
Set timestamp update high register and timestamp update low register to configure system time value;
8.
Set ETH_PTPTSCTRL.TSINIT to 1, initialize system time, replace original system time with the value of
timestamp high and low update registers, and timestamp counter starts to work.
Steps to update system time with coarse adjustment
1.
Set offset value to timestamp update high register and timestamp update low register, the value can be negative;
2.
Set ETH_PTPTSCTRL.TSUPDT to 1, enable updating system time, and add the offset values of timestamp high
and low update registers to the original system time;
3.
Wait for ETH_PTPTSCTRL.TSUPDT bit to be cleared.
Steps to update system time with fine adjustment
1.
Calculate the value of the addend register corresponding to the desired system clock frequency according to the
introduction of the "System time calibration method" above;
2.
Write the value to upcounter, and set ETH_PTPTSCTRL.TSADDREG to 1, and update the value to PTP module;
3.
Write the desired time into the timestamp update high register and timestamp update low register, and set
ETH_MACINTMSK.TSIM to 0 to allow timestamp interrupts;
4.
Set ETH_PTPTSCTRL.TSTRIG to 1 to enable timestamp interrupt;
5.
When timestamp interrupt occurs, read the value of ETH_MACINTSTS register and clear the corresponding
interrupt flag bit;
6.
Write the original value into the timestamp addend register, then set ETH_PTPTSCTRL.TSADDREG to 1, and
update the value to PTP module.
Transmission and receive of frames with PTP function
If IEEE 1588 (PTP) timestamp function is enabled, when MAC outputs the SFD of the transmitted frame or receives
the SFD of the received frame, the 64-bit timestamp value will be recorded, and stored together with the frame's
transmit/receive status information. To the corresponding transmit/receive descriptor, "TxDMA descriptor" and
"RxDMA descriptor" are described in detail.
PTP pulse-per-second output signal (PPS)
After ETH module is enabled, PPS output function is automatically turned on, and it is output to PB5/PB6 in different
