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Nations Technologies Inc.
Tel
:
+86-755-86309900
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Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North.
Nanshan District, Shenzhen, 518057, P.R.China
synchronization between systems.
Note: F
S
is the sampling frequency of audio signal
In master mode, I2S uses its own clock generator to generate clock signals for communication, and this clock
generator is also the clock source of the master clock output (SPI_I2SPREDIV.MCLKOEN = 1, the master clock
output is enabled).
21.4.1
Supported audio protocols
Four audio standards can be selected by setting the SPI_I2SCFG.STDSEL[1:0] bits:
I
2
S Philips standard
MSB alignment standard
LSB alignment standard
PCM standard
The audio data of the left channel and the right channel are usually time-division multiplexed, and the left channel
always sends data before the right channel. By checking the SPI_STS.CHSIDE bit, the user can distinguish which
channel the received data belongs to. However, in the PCM audio standard, the CHSIDE bit has no meaning.
By setting the SPI_I2SCFG.TDATLEN bits, the user can set the length of the data to be transmitted, and set the data
bit width of the channel by setting the SPI_I2SCFG.CHBITS bits. There are 4 data formats for sending data as follows:
16-bit data is packed into 16-bit data frame
16-bit data is packed into a 32-bit data frame (the first 16 bits are meaningful data, and the last 16 bits are set to
0 by hardware)
24-bit data is packed into 32-bit data frame (the first 24-bit data is meaningful data, and the latter 8-bit data is
set to 0 by hardware)
32-bit data is packed into 32-bit data frame
I2S uses the same SPI_DAT register as SPI to send and receive 16-bit wide data. If I2S needs to send or receive 24-
bit or 32-bit wide data, the CPU needs to read or write the SPI_DAT register twice. On the other hand, when I2S
sends or receives 16-bit wide data, the CPU only needs to read or write the SPI_DAT register once.
Regardless of which data format and communication standard is used, I2S always sends the data high-order bit (MSB)
first.
I
2
S Philips standard
Using the I2S Philips standard, the device that sends data changes the data on the falling edge of the clock, and the
device that receives data samples the data on the rising edge of the clock. The WS signal should be valid one clock
before the first data bit (MSB) is sent and will change on the falling edge of the clock signal.