Remote Operation
Check 5502A Status
5
5-43
Change the contents of variables A and B into binary, and you can read the status of the
registers. For example if A is 32, its binary equal is: 00000000 00100000. Thus, bit 5
(CME) in the ESR is set (1) and the remaining of the bits are reset (0). This means that
the Calibrator tried to do an incorrectly formed command.
If you set the bits in the ESE, you can mask (disable) the related bits in the ESR. For
example, to prevent the occurrence of a command error from causing bit 5 (ESB) in the
serial poll status byte to go to 1, you can reset (to 0) bit 5 in the ESE register. The
subsequent sample program makes sure of the status of the CME bit, then toggles it if it is
1.
10 ! THIS PROGRAM RESETS BIT 5 (CME) IN THE ESE
20 PRINT @6,”*ESE 33” ! INITIAL ESE IS CME + OPC
30 GOSUB 100 ! GET AND PRINT INITIAL ESE
40 IF (A% AND 32%) THEN A% = A% - 32% ! CLEAR CME (BIT 5)
50 PRINT @6, “*ESE “;A% ! LOAD ESE WITH NEW VALUE
60 GOSUB 100 ! GET AND PRINT NEW ESE
70 END
100 PRINT @6, “*ESE?” ! ASK FOR ESE CONTENTS
110 INPUT @6, A% ! RETRIEVE REGISTER CONTENTS
120 PRINT “ESE = “;A%
130 RETURN
Instrument Status Register (ISR)
The Instrument Status Register (ISR) gives the controller access to the condition of the
Calibrator, including some of the information given to the operator on the Control
Display and the display annunciators during local operation.
Instrument Status Change Registers
There are two registers that monitor changes in the ISR. These are the ISCR0 (Instrument
Status 1-0 Change Register) and the ISCR1 (Instrument Status 0-1 Change Register).
Each status change register has a related mask register. Each ISCR is cleared (set to 0)
when your turn the Calibrator on, each time it is read, and at each
*CLS
(Clear Status)
command.
Instrument Status Change Enable Registers
The Instrument Status Change Enable registers (ISCE0 and ISCE1) are mask registers for
the ISCR0 and ISCR1 registers. If a bit in the ISCE is enabled (set to 1) and the related
bit in the ISCR makes the correct change, the ISCB bit in the Status Byte is set to 1. If all
bits in the ISCE are disabled (set to 0), the ISCB bit in the Status Byte does not go to 1.
The contents of the ISCE registers are set to 0 at power-up.
Bit Assignments for the ISR, ISCR, and ISCE
The bits in the Instrument Status, Instrument Status Change, and Instrument Status
Change Enable registers are given in Figure 5-11.
Summary of Contents for 5502A
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