ABB REL670 2.2 IEC, Applications Manual

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tMinSynch
The setting tMinSynch is set to limit the minimum time at which the synchronizing
closing attempt is given. The synchronizing function will not give a closing
command within this time, from when the synchronizing is started, even if a
synchronizing condition is fulfilled. A typical setting is 200 ms.
Synchrocheck settings
OperationSC
The OperationSC setting Off disables the synchrocheck function and sets the
outputs AUTOSYOK, MANSYOK, TSTAUTSY and TSTMANSY to low. With
the setting
On , the function is in the service mode and the output signal depends on
the input conditions.
UHighBusSC and UHighLineSC
The voltage level settings must be chosen in relation to the bus or line network
voltage. The threshold voltages
UHighBusSC and UHighLineSC have to be set
lower than the value at which the breaker is expected to close with the synchronism
check. A typical value can be 80% of the base voltages.
UDiffSC
The setting for voltage difference between line and bus in p.u. This setting in p.u. is
defined as (U-Bus/
GblBaseSelBus ) - (U-Line/ GblBaseSelLine ). A normal setting is
0,10-0,15 p.u.
FreqDiffM and FreqDiffA
The frequency difference level settings, FreqDiffM and FreqDiffA , shall be chosen
depending on the condition in the network. At steady conditions a low frequency
difference setting is needed, where the
FreqDiffM setting is used. For autoreclosing
a bigger frequency difference setting is preferable, where the FreqDiffA setting is
used. A typical value for FreqDiffM can be10 mHz, and a typical value for
FreqDiffA can be 100-200 mHz.
PhaseDiffM and PhaseDiffA
The phase angle difference level settings, PhaseDiffM and PhaseDiffA , shall also
be chosen depending on conditions in the network. The phase angle setting must be
chosen to allow closing under maximum load condition. A typical maximum value
in heavy-loaded networks can be 45 degrees, whereas in most networks the
maximum occurring angle is below 25 degrees. The
PhaseDiffM setting is a
limitation to PhaseDiffA setting. Fluctuations occurring at high speed autoreclosing
limit PhaseDiffA setting.
tSCM and tSCA
The purpose of the timer delay settings, tSCM and tSCA , is to ensure that the
synchrocheck conditions remains constant and that the situation is not due to a
1MRK 506 369-UEN B
Section 15
Control
Line distance protection REL670 2.2 IEC 611
Application manual