Ronde & Schwarz 1304.0004K03, Руководство пользователя

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Network Operation and Remote Control
R&S
®
FPL1000
559 User Manual 1178.3370.02 ─ 11
Table 9-6: Meaning of the bits used in the STATus:QUEStionable:ACPLimit register
Bit No. Meaning
0 ADJ UPPer FAIL
This bit is set if the limit is exceeded in the upper adjacent channel
1 ADJ LOWer FAIL
This bit is set if the limit is exceeded in the lower adjacent channel.
2 ALT1 UPPer FAIL
This bit is set if the limit is exceeded in the upper 1st alternate channel.
3 ALT1 LOWer FAIL
This bit is set if the limit is exceeded in the lower 1st alternate channel.
4 ALT2 UPPer FAIL
This bit is set if the limit is exceeded in the upper 2nd alternate channel.
5 ALT2 LOWer FAIL
This bit is set if the limit is exceeded in the lower 2nd alternate channel.
6 ALT3 … 11 LOWer/UPPer FAIL
This bit is set if the limit is exceeded in one of the lower or upper alternate channels 3 … 11.
7 CACLR FAIL
This bit is set if the CACLR limit is exceeded in one of the gap channels.
8-14 Unused
15 This bit is always 0.
9.2.2.7 STATus:QUEStionable:EXTended Register
The
STATus:QUEStionable:EXTended
register contains further status information
not covered by the other status registers of the R&S FPL1000. A separate
EXTended
register exists for each active channel.
You can read out the register with
STATus:QUEStionable:EXTended:CONDition?
or
STATus:QUEStionable:EXTended[:EVENt]?
Table 9-7: Meaning of the bits used in the STATus:QUEStionable:EXTended register
Bit No. Meaning
0 not used
1 INFO
This bit is set if a status message is available for the application.
Which type of message occurred is indicated in the STATus:QUEStionable:EXTended:INFO
Register .
2 to 14 Unused
15 This bit is always 0.
Status Reporting System