Section 17 Flash Memory
Rev. 3.00 Sep. 27, 2007 Page 611 of 758
REJ09B0243-0300
(2) Programming Procedure in User Program Mode
The procedures for download, initialization, and programming are shown in figure 17.11.
Select on-chip program
to be downloaded and
set download destination
by FTDAR
Set FKEY to H'A5
After clearing VBR,
set SCO to 1 and
execute download
DPFR = 0?
Yes
No
Download error processing
Set the FPEFEQ and
FUBRA parameters
Initialization
JSR FTDAR s 32
Yes
End programming
procedure program
FPFR = 0?
No
Initialization error processing
Clear FKEY to 0
Set parameter to R4 and
R5 (FMPAR and FMPDR)
Programming
JSR FTDAR s 16
Yes
FPFR = 0?
No
Clear FKEY and
programming
error processing
Yes
Required data
programming is
completed?
No
Set FKEY to H'5A
Clear FKEY to 0
(2.1)
(2.2)
(2.4)
(2.5)
(2.6)
(2.7)
(2.8)
(2.9)
(2.10)
(2.11)
(2.12)
(2.13)
(2.14)
1
1
(2.3)
Download
Initialization
Programming
Start programming
procedure program
Figure 17.11 Programming Procedure
The details of the programming procedure are described below. The procedure program must
be executed in an area other than the flash memory to be programmed. Especially the part
where the SCO bit in FCCS is set to 1 for downloading must be executed in the on-chip RAM.
Specify 1/4 (initial value) as the frequency division ratios of an internal clock (I
φ
), a bus clock
(B
φ
), and a peripheral clock (P
φ
) through the frequency control register (FRQCR).
After the programming/erasing program has been downloaded and the SCO bit is cleared to 0,
the setting of the frequency control register (FRQCR) can be changed to the desired value. The
following description assumes the area to be programmed on the user MAT is erased and
program data is prepared in the consecutive area. When erasing has not been executed, carry
out erasing before writing.
Summary of Contents for SH7124 R5F7124
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Page 68: ...Section 2 CPU Rev 3 00 Sep 27 2007 Page 48 of 758 REJ09B0243 0300 ...
Page 108: ...Section 5 Exception Handling Rev 3 00 Sep 27 2007 Page 88 of 758 REJ09B0243 0300 ...
Page 166: ...Section 7 User Break Controller UBC Rev 3 00 Sep 27 2007 Page 146 of 758 REJ09B0243 0300 ...
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