Renesas SH7124 R5F7124, Hardware Manual

Page: 217 / 782

Section 9 Multi-Function Timer Pulse Unit 2 (MTU2)
Rev. 3.00 Sep. 27, 2007 Page 197 of 758
REJ09B0243-0300
Bit Bit Name
Initial
Value
R/W Description
0 TGFA 0 R/(W) *
1
Input Capture/Output Compare Flag A
Status flag that indicates the occurrence of TGRA input
capture or compare match. Only 0 can be written, for
flag clearing.
[Setting conditions]
•
When TCNT = TGRA and TGRA is functioning as
output compare register
•
When TCNT value is transferred to TGRA by input
capture signal and TGRA is functioning as input
capture register
[Clearing condition]
•
When 0 is written to TGFA after reading TGFA =
1 *
2
Notes: 1. Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.
2. If another flag setting condition occurs before writing 0 to the bit after reading it as 1, the
flag will not be cleared by writing 0 to it once. In this case, read the bit as 1 again and
write 0 to it.